# US 12,224,351 B2 · Semiconductor device and method of manufacturing the same

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- Number: US 12,224,351 B2
- Document ID: US12224351B2
- Status: Granted
- Kind: B2
- Application number: 18/352,230
- Filed: 2023-07-13
- Published: 2023-11-09
- Granted: 2025-02-11
- Earliest claimed: 2019-09-22
- Assignees: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicants: Taiwan Semiconductor Manufacturing Company, Ltd.
- Inventors: Chao-Ching Cheng; Chun-Chieh Lu; Hung-Li Chiang; Tzu-Chiang Chen
- Web page: https://patentgrep.com/patent/US12224351B2

## CPC

- H10D 30/6731: {Top-gate only TFTs}
- H10D 30/675: {Group III-V materials, Group II-VI materials, Group IV-VI materials, selenium or tellurium}
- H10D 30/0314: {of lateral top-gate TFTs comprising only a single gate}
- H10D 30/0321: {comprising silicon, e.g. amorphous silicon or polysilicon}
- H10D 30/481: {FETs having two-dimensional material channels, e.g. transition metal dichalcogenide [TMD] FETs}
- H10D 30/6741: {Group IV materials, e.g. germanium or silicon carbide (TFTs having oxide semiconductors H10D30/6755)}
- H10D 30/6745: {Polycrystalline or microcrystalline silicon}
- H10D 30/6757: {characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile (TFTs having channel structures for preventing kink or snapback effects H10D30/6708; TFTs having lightly-doped source or drain extensions H10D30/6715)}
- H10D 64/258: {characterised by the relative positions of the source or drain electrodes with respect to the gate electrode}
- H10D 99/00: Subject matter not provided for in other groups of this subclass
- H10D 64/62: Electrodes ohmically coupled to a semiconductor
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

A semiconductor device includes a substrate, a first poly-material pattern, a first conductive element, a first semiconductor layer, and a first gate structure. The first poly-material pattern is over and protrudes outward from the substrate, wherein the first poly-material pattern includes a first active portion and a first poly-material portion joined to the first active portion. The first conductive element is over the substrate, wherein the first conductive element includes the first poly-material portion and a first metallic conductive portion covering at least one of a top surface and a sidewall of the first poly-material portion. The first semiconductor layer is over the substrate and covers the first active portion of the first poly-material pattern and the first conductive element. The first gate structure is over the first semiconductor layer located within the first active portion.

## Claims

### Claim 1

A semiconductor device, comprising:
a first gate structure, disposed over a substrate;
a first semiconductor layer, disposed over the substrate, the first semiconductor layer being overlapped with the first gate structure; and
at least one first conductive element, disposed over the substrate and connected to the first semiconductor layer, a portion of the first semiconductor layer being between the first gate structure and the at least one first conductive element, wherein the at least one first conductive element comprises:
a first poly-material portion; and
a first metallic portion, in physical contact with at least one of an entire top surface and an entire sidewall of the first poly-material portion.

### Claim 2 (depends on 1)

The semiconductor device of claim 1, wherein the first metallic portion is in physical contact with the entire top surface and the entire sidewall of the first poly-material portion, and the first poly-material portion is free of the first semiconductor layer.

### Claim 3 (depends on 1)

The semiconductor device of claim 1, wherein the first metallic portion is in physical contact with the entire top surface the first poly-material portion, and the entire sidewall of the first poly-material portion is in physical contact with the first semiconductor layer.

### Claim 4 (depends on 1)

The semiconductor device of claim 1, wherein the first metallic portion is in physical contact with the entire sidewall of the first poly-material portion, and the entire top surface of the first poly-material portion is in physical contact with the first semiconductor layer.

### Claim 5 (depends on 1)

The semiconductor device of claim 1, wherein the at least one first conductive element comprises two first conductive elements disposed at two opposite sides of the first gate structure,
wherein the two first conductive elements are overlapped with the first semiconductor layer and are separated from the first gate structure, the first semiconductor layer is disposed between the first gate structure and the two first conductive elements, and the two first conductive elements are disposed between the first semiconductor layer and the substrate.

### Claim 6 (depends on 1)

The semiconductor device of claim 1, wherein the at least one first conductive element comprises two first conductive elements disposed at two opposite sides of the first gate structure,
wherein the two first conductive elements are overlapped with the first semiconductor layer and are separated from the first gate structure, the two first conductive elements are disposed between the first semiconductor layer and the first gate structure, and the first gate structure is disposed between the two first conductive elements and the substrate.

### Claim 7 (depends on 1)

The semiconductor device of claim 1, wherein the at least one first conductive element comprises one first conductive element disposed at one side of the first gate structure, and the semiconductor device further comprises:
two first source/drain (S/D) elements, disposed at two opposite sides of the first gate structure, wherein the two first S/D elements are overlapped with the first semiconductor layer and are separated from the first gate structure, the first semiconductor layer is disposed between the first gate structure and the two first S/D elements, and the first gate structure is disposed between the first semiconductor layer and the substrate.

### Claim 8 (depends on 1)

The semiconductor device of claim 1, wherein the at least one first conductive element comprises one first conductive element disposed at one side of the first gate structure, and the semiconductor device further comprises:
two first source/drain (S/D) elements, disposed at two opposite sides of the first gate structure, wherein the two first S/D elements are overlapped with the first semiconductor layer and are separated from the first gate structure, the two first S/D elements are disposed between the first semiconductor layer and the first gate structure, and the two first S/D elements are disposed between the first gate structure and the substrate.

### Claim 9 (depends on 1)

The semiconductor device of claim 1, wherein a material of the first poly-material portion comprises a polysilicon material, a poly-germanium material, or a poly-silicon-germanium material, and a material of the first metallic portion comprises a metal or a metal silicide.

### Claim 10 (depends on 1)

The semiconductor device of claim 1, further comprising:
a first poly-material pattern, disposed over the substrate and having a first active portion and the first poly-material portion physically connected to the first active portion, the first active portion is free of the first metallic portion, wherein the first poly-material pattern is covered by the first semiconductor layer; and
a dielectric layer, sandwiched between the first poly-material pattern and the substrate, and the first poly-material pattern being disposed between the first semiconductor layer and the dielectric layer,
wherein the first semiconductor layer is disposed between the first gate structure and the first active portion of the first poly-material pattern.

### Claim 11 (depends on 10)

The semiconductor device of claim 10, further comprising:
first source/drain (S/D) elements, disposed at two opposite sides of the first gate structure and disposed on the first semiconductor layer over the first active portion,
wherein the first semiconductor layer is further disposed between the first S/D elements and the first active portion of the first poly-material pattern.

### Claim 12 (depends on 10)

The semiconductor device of claim 10, further comprising:
at least one second conductive element, disposed over the substrate, wherein the at least one second conductive element comprises:
a second poly-material portion; and
a second metallic portion, in physical contact with at least one of a top surface and a sidewall of the second poly-material portion;
a second poly-material pattern, disposed on the dielectric layer and having a second active portion and the second poly-material portion physically connected to the second active portion, the second active portion is free of the second metallic portion;
a second semiconductor layer, disposed on the second poly-material pattern; and
a second gate structure, disposed on the second semiconductor layer,
wherein the dielectric layer is sandwiched between the second poly-material pattern and the substrate, the second poly-material pattern is disposed between the second semiconductor layer and the dielectric layer, and the second semiconductor layer is disposed between the second gate structure and the second active portion of the second poly-material pattern.

### Claim 13 (depends on 12)

The semiconductor device of claim 12, further comprising:
second source/drain (S/D) elements, disposed at two opposite sides of the second gate structure and disposed on the second semiconductor layer over the second active portion,
wherein the second semiconductor layer is further disposed between the second S/D elements and the second active portion of the second poly-material pattern.

### Claim 14 (depends on 12)

The semiconductor device of claim 12, wherein a material of the second poly-material portion comprises a polysilicon material, a poly-germanium material, or a poly-silicon-germanium material, and a material of the second metallic portion comprises a metal or a metal silicide.

### Claim 15

A semiconductor device, comprising:
a semiconductor substrate;
a conductive element, disposed on the semiconductor substrate, wherein the conductive element comprises a semiconductor portion and a conductive portion joined to the semiconductor portion;
a channel layer, laying onto the conductive element and extending outward from an edge of conductive element and over the semiconductor substrate; and
a gate, disposed over the semiconductor substrate and overlapping with the channel layer, wherein the gate is vertically disposed between the semiconductor substrate and the conductive element.

### Claim 16 (depends on 15)

The semiconductor device of claim 15, wherein the conductive element is between the gate and the channel layer, and the conductive portion is in physical contact with at least one of a top surface and a sidewall of the semiconductor portion.

### Claim 17 (depends on 15)

The semiconductor device of claim 15, further comprising:
source/drain (S/D) elements, disposed over the semiconductor substrate, the gate and the channel layer, wherein the channel layer further extending between the S/D elements,
wherein a vertical projection of the conductive element is offset from vertical projections of the S/D elements in a stacking direction of the gate and the semiconductor substrate.

### Claim 18

A semiconductor device, comprising:
a semiconductor substrate;
a conductive element, disposed on the semiconductor substrate, wherein the conductive element comprises a semiconductor portion and a conductive portion joined to the semiconductor portion;
a channel layer, laying onto the conductive element, wherein in a cross-section along a vertical direction, the channel layer extends beyond opposite edges of conductive element and over the semiconductor substrate; and
a gate, disposed over the semiconductor substrate and overlapping with the channel layer, wherein the channel layer is disposed between the semiconductor substrate and the gate.

### Claim 19 (depends on 18)

The semiconductor device of claim 18, wherein the conductive element is between the gate and the semiconductor substrate, and the conductive portion is in physical contact with at least one of a top surface and a sidewall of the semiconductor portion.

### Claim 20 (depends on 18)

The semiconductor device of claim 18, further comprising:
source/drain (S/D) elements, disposed between the semiconductor substrate and the gate, wherein the channel layer further extending between the S/D elements,
wherein a vertical projection of the conductive element is offset from vertical projections of the S/D elements in a stacking direction of the gate and the semiconductor substrate.
