# US 12,224,321 B2 · Scalable MPS device based on SiC > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,224,321 B2 - Document ID: US12224321B2 - Status: Granted - Kind: B2 - Application number: 18/532,975 - Filed: 2023-12-07 - Published: 2024-05-30 - Granted: 2025-02-11 - Earliest claimed: 2020-07-27 - Assignees: STMicroelectronics S.r.l. - Applicants: STMICROELECTRONICS S.r.l. - Inventors: Simone Rascuná; Mario Giuseppe Saggio - Web page: https://patentgrep.com/patent/US12224321B2 ## CPC - H10D 62/106: {having supplementary regions doped oppositely to or in rectifying contact with regions of the semiconductor bodies, e.g. guard rings with PN or Schottky junctions} - H10D 62/8325: {Silicon carbide} - H10D 8/045: {of PN junction diodes} - H10D 8/051: {of Schottky diodes} - H10D 8/60: Schottky-barrier diodes - H10D 62/126: {Top-view geometrical layouts of the regions or the junctions} - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES ## Abstract Merged-PiN-Schottky, MPS, device comprising: a substrate of SiC with a first conductivity; a drift layer of SiC with the first conductivity, on the substrate; an implanted region with a second conductivity, extending at a top surface of the drift layer to form a junction-barrier, JB, diode with the substrate; and a first electrical terminal in ohmic contact with the implanted region and in direct contact with the top surface to form a Schottky diode with the drift layer. The JB diode and the Schottky diode are alternated to each other along an axis: the JB diode has a minimum width parallel to the axis with a first value, and the Schottky diode has a maximum width parallel to the axis with a second value smaller than, or equal to, the first value. A breakdown voltage of the MPS device is greater than, or equal to, 115% of a maximum working voltage of the MPS device in an inhibition state. ## Claims ### Claim 1 A device, comprising: a substrate of silicon carbide; a drift layer of silicon carbide on the substrate; a first implanted region in the drift layer, the first implanted region having a first dimension in a first direction; a second implanted region in the drift layer, the second implanted region having a second dimension in the first direction, the second implanted region being spaced from the first implanted region by a third dimension in the first direction, the third dimension being less than both the first and the second dimension; a first ohmic contact in the first implanted region; a second ohmic contact in the second implanted region; a first junction-barrier (JB) diode at a first surface of the drift layer and the first implanted region; a second junction-barrier (JB) diode at the first surface of the drift layer and the second implanted region; and a first electrical terminal in ohmic contact with the first surface of the drift layer at the first implanted region and the second implanted region a first Schottky diode at the drift layer between the first and second implanted regions. ### Claim 2 (depends on 1) The device of claim 1 wherein the first ohmic contact has a fourth dimension in the first direction, the fourth dimension being less than the first dimension. ### Claim 3 (depends on 2) The device of claim 2 wherein the second ohmic contact has a fifth dimension in the first direction, the fifth dimension being less than the second dimension. ### Claim 4 (depends on 3) The device of claim 3 wherein the first electrical terminal having a sixth dimension in the first direction that is greater than a sum of the first, second, and third dimensions. ### Claim 5 (depends on 4) The device of claim 4 wherein the drift layer has a dopant concentration such that a breakdown voltage, beyond which a charge carrier multiplication phenomenon occurs, is greater than, or equal to, 115% of a maximum working voltage of the device in an inhibition state. ### Claim 6 A device, comprising: a drift layer of a first conductivity type, the drift layer having a first surface; a first implanted region of a second conductivity type extending in the drift layer from the first surface, the first implanted region having a first dimension in a first direction; a second implanted region of the second conductivity type extending into the drift layer from the first surface, the second implanted region having a second dimension in the first direction, the second implanted region being spaced from the first implanted region by a third dimension in the first direction, the third dimension being less than the second dimension, the third dimension being less than the first dimension; a first terminal on the first surface of the drift layer; a first Schottky diode between the first terminal and the drift layer between the first and second implanted regions. ### Claim 7 (depends on 6) The device of claim 6, comprising a first junction barrier diode between the first implanted region and the first terminal and a second junction barrier diode between the second implanted region and the first terminal. ### Claim 8 (depends on 7) The device of claim 7 wherein first terminal being on the first and second implanted regions, the first terminal having a fourth dimension in the first direction, the fourth dimension being greater than a sum of the first, second, and third dimensions. ### Claim 9 (depends on 8) The device of claim 8, comprising a protection ring in the drift layer and surrounding the first and second implanted regions. ### Claim 10 (depends on 9) The device of claim 9 wherein a first end of the first terminal overlaps a portion of the protection ring adjacent to the first implanted region and a second end of the first terminal overlaps a portion of the protection ring adjacent to the second implanted region. ### Claim 11 A device, comprising: a substrate; a drift layer of silicon carbide on the substrate; a first implanted region in the drift layer, the first implanted region having a first dimension in a first direction; a second implanted region in the drift layer, the second implanted region having a second dimension in the first direction, the second implanted region being spaced from the first implanted region by a third dimension in the first direction, the third dimension being less than both the first and the second dimension; a first ohmic contact in the first implanted region; a second ohmic contact in the second implanted region. ### Claim 12 (depends on 11) The device of claim 11, comprising a first junction-barrier (JB) diode at a first surface of the drift layer and the first implanted region and a second junction-barrier (JB) diode at the first surface of the drift layer and the second implanted region. ### Claim 13 (depends on 12) The device of claim 12 comprising a first electrical terminal in ohmic contact with the first surface of the drift layer at the first implanted region and the second implanted region. ### Claim 14 (depends on 13) The device of claim 13, comprising a first Schottky diode at the drift layer between the first and second implanted regions. ### Claim 15 (depends on 14) The device of claim 14 wherein the substrate is silicon carbide and has a first conductivity type, the drift layer having the first conductivity type, and the first and second implanted regions having a second conductivity type. ### Claim 16 (depends on 15) The device of claim 15 wherein the first ohmic contact has a fourth dimension in the first direction, the fourth dimension being less than the first dimension. ### Claim 17 (depends on 16) The device of claim 16 wherein the second ohmic contact has a fifth dimension in the first direction, the fifth dimension being less than the second dimension. ### Claim 18 (depends on 17) The device of claim 17 wherein the first electrical terminal having a sixth dimension in the first direction that is greater than a sum of the first, second, and third dimensions.