# US 12,224,320 B2 · Silicon carbide semiconductor device and method of manufacturing silicon carbide semiconductor device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,224,320 B2 - Document ID: US12224320B2 - Status: Granted - Kind: B2 - Application number: 17/587,802 - Filed: 2022-01-28 - Published: 2022-09-08 - Granted: 2025-02-11 - Earliest claimed: 2021-03-05 - Assignees: Fuji Electric Co., Ltd. - Applicants: Fuji Electric Co., Ltd. - Inventors: Yoshihito Ichikawa - Web page: https://patentgrep.com/patent/US12224320B2 ## CPC - H10D 62/8325: {Silicon carbide} - H10D 30/0297: {using recessing of the gate electrodes, e.g. to form trench gate electrodes} - H10D 30/665: {having edge termination structures} - H10D 30/668: {having trench gate electrodes, e.g. UMOS transistors} - H10D 62/107: {Buried supplementary regions, e.g. buried guard rings (multi-RESURF H10D62/111)} - H10D 62/157: {Impurity concentrations or distributions} - H10P 34/40: with high-energy radiation - H10D 62/393: {Body regions of DMOS transistors or IGBTs (cell layout of DMOS H10D62/127)} - H10D 64/0115: {to silicon carbide} - H10P 30/2042: {into crystalline silicon carbide} - H10P 30/218: {characterised by the implantation in a compound semiconductor of both electrically active and inactive species in the same semiconductor region to be doped n-type or p-type} - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES - H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10 ## Abstract At any timing after formation of gate electrodes, particle beam irradiation is performed to a semiconductor wafer having an n−-type drift region constituted by an n−-type epitaxial layer and having an n-type impurity concentration that is higher than a target majority carrier concentration (design value) of the n−-type drift region. Point defects of a defect density corresponding to an irradiation dose of the particle beam are generated in the n−-type drift region by the particle beam irradiation, whereby an effective majority carrier concentration of the n−-type drift region is adjusted and reduced with respect to the n-type impurity concentration of the n−-type drift region, to approach the design value. After formation of the n−-type epitaxial layer, the n-type impurity concentration of the n−-type drift region may be measured, or the n−-type epitaxial layer may be formed to have an n-type impurity concentration higher than the design value. ## Claims ### Claim 1 A silicon carbide semiconductor device, comprising: a starting substrate containing silicon carbide and having a first surface and a second surface opposite to each other; a first-conductivity-type epitaxial layer provided on the first surface of the starting substrate; a second-conductivity-type epitaxial layer provided on the first-conductivity-type epitaxial layer; and a pn junction through which a main current passes, the pn junction being between the second-conductivity-type epitaxial layer and the first-conductivity-type epitaxial layer, wherein the first-conductivity-type epitaxial layer contains a plurality of point defects at a defect density corresponding to an irradiation dose of a particle beam, the first-conductivity-type epitaxial layer having an effective majority carrier concentration that is lower than a concentration of a first-conductivity-type impurity of the first-conductivity-type epitaxial layer. ### Claim 2 (depends on 1) The silicon carbide semiconductor device according to claim 1, wherein the effective majority carrier concentration of the first-conductivity-type epitaxial layer is at least 70% but less than 100% of the concentration of the first-conductivity-type impurity of the first-conductivity-type epitaxial layer. ### Claim 3 (depends on 1) The silicon carbide semiconductor device according to claim 1, wherein the effective majority carrier concentration of the first-conductivity-type epitaxial layer is within 10% lower than the concentration of the first-conductivity-type impurity of the first-conductivity-type epitaxial layer. ### Claim 4 (depends on 1) The silicon carbide semiconductor device according to claim 1, wherein the particle beam contains helium, protons or electrons. ### Claim 5 (depends on 1) The silicon carbide semiconductor device according to claim 1, wherein an entire area of the first-conductivity-type epitaxial layer and an entire area of the starting substrate contain the point defects. ### Claim 6 (depends on 1) The silicon carbide semiconductor device according to claim 1, further comprising: a plurality of first-conductivity-type regions provided in the second-conductivity-type epitaxial layer; a second-conductivity-type region that is a portion of the second-conductivity-type epitaxial layer free of the first-conductivity-type regions; a gate insulating film provided in contact with a region of the second-conductivity-type region between one of the first-conductivity-type regions and the first-conductivity-type epitaxial layer; a gate electrode provided facing the second-conductivity-type region with the gate insulating film intervening therebetween; a first electrode electrically connected to the first-conductivity-type regions and the second-conductivity-type region; and a second electrode provided on the second surface of the starting substrate. ### Claim 7 (depends on 1) A method of manufacturing the silicon carbide semiconductor device according to claim 1, the method comprising: preparing, as a first process, the starting substrate containing silicon carbide and epitaxially growing the first-conductivity-type epitaxial layer on the first surface of the starting substrate; epitaxially growing the second-conductivity-type epitaxial layer on the first-conductivity-type epitaxial layer as a second process; forming, as a third process, a plurality of first-conductivity-type regions in the second-conductivity-type epitaxial layer, a portion of the second-conductivity-type epitaxial layer free of the first-conductivity-type regions constituting a second-conductivity-type region; forming a gate insulating film in contact with a region of the second-conductivity-type region as a fourth process, the region being between one of the first-conductivity-type regions and the first-conductivity-type epitaxial layer; forming a gate electrode facing the second-conductivity-type region with the gate insulating film intervening therebetween as a fifth process; forming a first electrode electrically connected to the first-conductivity-type regions and the second-conductivity-type region as a sixth process; forming a second electrode on the second surface of the starting substrate as a seventh process; measuring a concentration of a first-conductivity-type impurity of the first-conductivity-type epitaxial layer as a measurement process, the measurement process being performed after the first process but before the second process; and when the concentration of the first-conductivity-type impurity of the first-conductivity-type epitaxial layer measured by the measurement process is higher than a design value, irradiating, as an adjustment process, the first-conductivity-type epitaxial layer with a particle beam, and reducing an effective majority carrier concentration of the first-conductivity-type epitaxial layer with respect to the concentration of the first-conductivity-type impurity of the first-conductivity-type epitaxial layer, to approach the design value. ### Claim 8 (depends on 7) The method according to claim 7, wherein in the adjustment process, the effective majority carrier concentration of the first-conductivity-type epitaxial layer is set to be at least 70% but less than 100% of the concentration of the first-conductivity-type impurity of the first-conductivity-type epitaxial layer. ### Claim 9 (depends on 7) The method according to claim 7, wherein in the adjustment process, the effective majority carrier concentration of the first-conductivity-type epitaxial layer is within 10% lower than the concentration of the first-conductivity-type impurity of the first-conductivity-type epitaxial layer. ### Claim 10 (depends on 7) The method according to claim 7, wherein in the adjustment process, the particle beam contains helium, protons or electrons. ### Claim 11 (depends on 7) The method according to claim 7, wherein the adjustment process includes performing a heat treatment at a temperature in a range from 350 degrees C. to 400 degrees C. after irradiating the first-conductivity-type epitaxial layer with the particle beam. ### Claim 12 (depends on 11) The method according to claim 11, wherein in the adjustment process, the heat treatment is performed for a length of time in a range from 30 minutes to 60 minutes. ### Claim 13 (depends on 11) The method according to claim 11, wherein the method is free of another heat treatment of a temperature of at least 400 degrees C. after the heat treatment of the adjustment process. ### Claim 14 (depends on 1) A method of manufacturing the silicon carbide semiconductor device according to claim 1, the method comprising: preparing, as a first process, the starting substrate containing silicon carbide and epitaxially growing the first-conductivity-type epitaxial layer on the first surface of the starting substrate, the first-conductivity-type epitaxial layer having a concentration of a first-conductivity-type impurity higher than a design value; epitaxially growing the second-conductivity-type epitaxial layer on the first-conductivity-type epitaxial layer as a second process; forming, as a third process, a plurality of first-conductivity-type regions in the second-conductivity-type epitaxial layer, a portion of the second-conductivity-type epitaxial layer free of the first-conductivity-type regions constituting a second-conductivity-type region; forming a gate insulating film in contact with a region of the second-conductivity-type region as a fourth process, the region being between one of the first-conductivity-type regions and the first-conductivity-type epitaxial layer; forming a gate electrode facing the second-conductivity-type region with the gate insulating film intervening therebetween as a fifth process; forming a first electrode electrically connected to the first-conductivity-type regions and the second-conductivity-type region as a sixth process; forming a second electrode on the second surface of the starting substrate as a seventh process; and irradiating, as an adjustment process, the first-conductivity-type epitaxial layer with a particle beam, and reducing an effective majority carrier concentration of the first-conductivity-type epitaxial layer with respect to the concentration of the first-conductivity-type impurity of the first-conductivity-type epitaxial layer, to approach the design value. ### Claim 15 (depends on 14) The method according to claim 14 wherein in the adjustment process, the effective majority carrier concentration of the first-conductivity-type epitaxial layer is set to be at least 70% but less than 100% of the concentration of the first-conductivity-type impurity of the first-conductivity-type epitaxial layer. ### Claim 16 (depends on 14) The method according to claim 14, wherein in the adjustment process, the effective majority carrier concentration of the first-conductivity-type epitaxial layer is within 10% lower than the concentration of the first-conductivity-type impurity of the first-conductivity-type epitaxial layer. ### Claim 17 (depends on 14) The method according to claim 14, wherein in the adjustment process, the particle beam contains helium, protons or electrons. ### Claim 18 (depends on 14) The method according to claim 14, wherein the adjustment process includes performing a heat treatment at a temperature in a range from 350 degrees C. to 400 degrees C. after irradiating the first-conductivity-type epitaxial layer with the particle beam. ### Claim 19 (depends on 18) The method according to claim 18, wherein in the adjustment process, the heat treatment is performed for a length of time in a range from 30 minutes to 60 minutes. ### Claim 20 (depends on 18) The method according to claim 18, wherein the method is free of another heat treatment of a temperature of at least 400 degrees C. after the heat treatment of the adjustment process.