# US 12,224,303 B2 · Manufacturing method of photoelectric conversion panel, photoelectric conversion panel, and X-ray panel

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- Number: US 12,224,303 B2
- Document ID: US12224303B2
- Status: Granted
- Kind: B2
- Application number: 18/197,117
- Filed: 2023-05-15
- Published: 2023-11-30
- Granted: 2025-02-11
- Earliest claimed: 2022-05-24
- Assignees: Sharp Display Technology Corporation
- Applicants: Sharp Display Technology Corporation
- Inventors: Makoto Nakazawa; Hiroyuki Moriwaki; Rikiya Takita; Tetsuya Tanishima
- Web page: https://patentgrep.com/patent/US12224303B2

## CPC

- H10F 39/014: {of CMOS image sensors}
- G01T 1/2018: {Scintillation-photodiode combinations}
- H10F 39/016: {of thin-film-based image sensors}
- H10F 39/1898: {Indirect radiation image sensors, e.g. using luminescent members}
- H10F 39/8037: {the integrated elements comprising a transistor}
- H10F 39/811: {Interconnections}
- H10F: INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- G01T: MEASUREMENT OF NUCLEAR OR X-RADIATION (radiation analysis of materials, mass spectrometry G01N23/00; tubes for determining the presence, intensity, density or energy of radiation or particles H01J47/00)

## Abstract

In a manufacturing method of a photoelectric conversion panel, a contact hole CH3 that exposes a part of an upper face of a photodiode and a contact hole CH2 that exposes a source connection electrode are formed in a first flattening film and in inorganic insulating films 105a to 105c, an inorganic insulating film 107 is formed, contact holes CH2a and CH3a are formed in the contact holes CH2 and CH3, respectively, and a bias line and a data line are formed in the contact holes CH2a and CH3a, respectively.

## Claims

### Claim 1

A manufacturing method of a photoelectric conversion panel comprising:
forming a transistor on a substrate;
forming a photodiode at an upper layer overlying the transistor;
forming a first insulating film configured to cover the photodiode;
forming a first flattening film configured to cover the first insulating film;
forming a first hole portion configured to expose a part of an upper face of the photodiode in the first flattening film and the first insulating film;
forming a second hole portion configured to expose a source electrode of the transistor or a connection electrode connected to the source electrode in the first flattening film and the first insulating film;
forming a second insulating film configured to cover the first flattening film, a part of the second insulating film being disposed in each of the first hole portion and the second hole portion;
forming a third hole portion in the second insulating film disposed in the first hole portion;
forming a fourth hole portion in the second insulating film disposed in the second hole portion;
forming a bias line at an upper layer overlying the second insulating film, a part of the bias line being disposed in the third hole portion; and
forming a data line at an upper layer overlying the second insulating film, a part of the data line being disposed in the fourth hole portion.

### Claim 2 (depends on 1)

The manufacturing method of a photoelectric conversion panel according to claim 1,
wherein the forming of the third hole portion includes forming a first step portion between the upper face of the photodiode and an upper face of the second insulating film in the first hole portion, and
the forming of the fourth hole portion includes forming a second step portion between the source electrode or the connection electrode and the upper face of the second insulating film in the second hole portion.

### Claim 3 (depends on 1)

The manufacturing method of a photoelectric conversion panel according to claim 1, further comprising,
after forming the first hole portion and the second hole portion and before forming the second insulating film, expanding a diameter of the first hole portion of the first flattening film and expanding a diameter of the second hole portion of the first flattening film.

### Claim 4 (depends on 1)

The manufacturing method of a photoelectric conversion panel according to claim 1,
wherein the forming of the transistor includes forming a terminal region electrode in a terminal region in which the terminal on the substrate is formed, and
the forming of the data line includes forming the data terminal at a position overlapping with the terminal region electrode in a plan view.

### Claim 5

A photoelectric conversion panel comprising:
a substrate;
a transistor formed on the substrate;
a photodiode formed at an upper layer overlying the transistor;
a first insulating film configured to cover the photodiode;
a first flattening film configured to cover the first insulating film;
a second insulating film configured to cover the first flattening film;
a bias line formed at an upper layer overlying the second insulating film; and
a data line formed at an upper layer overlying the second insulating film,
wherein each of the first flattening film and the first insulating film includes a first hole portion connected to an upper face of the photodiode and a second hole portion connected to a source electrode of the transistor or a connection electrode connected to the source electrode,
a part of the second insulating film is disposed in each of the first hole portion and the second hole portion,
a portion of the second insulating film disposed in the first hole portion includes a third hole portion,
a portion of the second insulating film disposed in the second hole portion includes a fourth hole portion,
a part of the bias line is disposed in the third hole portion, and
a part of the data line is disposed in the fourth hole portion.

### Claim 6

An X-ray panel comprising:
a scintillator configured to fluoresce by being irradiated with X-rays;
a substrate;
a transistor formed on the substrate;
a photodiode configured to convert light from the scintillator into an electric signal, the photodiode being formed at an upper layer overlying the transistor;
a first insulating film configured to cover the photodiode;
a first flattening film configured to cover the first insulating film;
a second insulating film configured to cover the first flattening film;
a bias line formed at an upper layer overlying the second insulating film; and
a data line formed at an upper layer overlying the second insulating film,
wherein each of the first flattening film and the first insulating film includes a first hole portion connected to an upper face of the photodiode and a second hole portion connected to a source electrode of the transistor or a connection electrode connected to the source electrode,
a part of the second insulating film is disposed in each of the first hole portion and the second hole portion,
a portion of the second insulating film disposed in the first hole portion includes a third hole portion,
a portion of the second insulating film disposed in the second hole portion includes a fourth hole portion,
a part of the bias line is disposed in the third hole portion, and
a part of the data line is disposed in the fourth hole portion.