# US 12,224,224 B2 · Package structure with metallic layer over the surfaces of a plurality of semiconductor dies

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- Number: US 12,224,224 B2
- Document ID: US12224224B2
- Status: Granted
- Kind: B2
- Application number: 17/693,444
- Filed: 2022-03-14
- Published: 2023-09-14
- Granted: 2025-02-11
- Earliest claimed: 2022-03-14
- Assignees: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicants: Taiwan Semiconductor Manufacturing Company, Ltd.
- Inventors: Chih-Hao Chen; Po-Yuan Cheng; Pu Wang; Li-Hui Cheng
- Web page: https://patentgrep.com/patent/US12224224B2

## CPC

- H10P 72/74: {using temporarily an auxiliary support}
- H10W 40/258: {Metallic materials (H10W40/254, H10W40/257, H10W40/255, H10W40/251, H10W40/253 take precedence)}
- H10W 70/02: of conductive package substrates serving as an interconnection, e.g. of metal plates (manufacture or treatment of leadframes H10W70/04)
- H10W 70/05: of insulating or insulated package substrates, or of interposers, or of redistribution layers (manufacture or treatment of leadframes H10W70/04)
- H10W 70/60: Insulating or insulated package substrates; Interposers; Redistribution layers (leadframes H10W70/40)
- H10W 70/611: {for connecting multiple chips together}
- H10W 70/614: {the multiple chips being integrally enclosed}
- H10W 70/635: {Through-vias}
- H10W 70/65: Shapes or dispositions of interconnections
- H10W 70/685: comprising multiple insulating layers
- H10W 74/012: {of encapsulations on active surfaces of flip-chip devices, e.g. forming underfills}
- H10W 74/111: {the semiconductor body being completely enclosed}
- H10W 74/15: on active surfaces of flip-chip devices, e.g. underfills
- H10W 76/12: characterised by their shape
- H10W 76/60: Seals
- H10W 90/00: Package configurations
- H10P 72/7418: {of passive members, e.g. a chip mounting substrate}
- H10P 72/7424: {used as a support during the manufacture of self-supporting substrates}
- H10W 40/10: Arrangements for heating
- H10W 40/22: characterised by their shape, e.g. having conical or cylindrical projections
- H10W 40/70: Fillings or auxiliary members in containers or in encapsulations for thermal protection or control
- H10W 74/00: Encapsulations, e.g. protective coatings
- H10W 90/401: {characterised by multiple insulating or insulated package substrates, interposers or RDLs}
- H10W 90/734: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A package structure includes first and second package components, an underfill layer disposed between the first and second package components, and a metallic layer. The first package component includes semiconductor dies, a first insulating encapsulation laterally encapsulating the semiconductor dies, and a redistribution structure underlying first surfaces of the semiconductor dies and the first insulating encapsulation. The second package component underlying the first package component is electrically coupled to the semiconductor dies through the redistribution structure. The underfill layer extends to cover a sidewall of the first package component, the metallic layer overlying second surfaces of the semiconductor dies and the first insulating encapsulation, and a peripheral region of the second surface of the first insulating encapsulation is accessibly exposed by the metallic layer, where the first surfaces are opposite to the second surfaces. A manufacturing method of a package structure is also provided.

## Claims

### Claim 1

A package structure, comprising:
a first package component comprising:
semiconductor dies, each of the semiconductor dies comprising a first surface and a second surface opposite to each other;
a first insulating encapsulation laterally encapsulating the semiconductor dies; and
a redistribution structure underlying the first surfaces of the semiconductor dies and a first surface the first insulating encapsulation, and the redistribution structure being electrically coupled to the semiconductor dies; and
a second package component underlying the first package component and electrically coupled to the semiconductor dies through the redistribution structure;
a first underfill layer disposed between the first and second package components and extending to cover a sidewall of the first package component; and
a metallic layer overlying the second surfaces of the semiconductor dies and a second surface of the first insulating encapsulation, wherein the first surface and the second surface of the first insulating encapsulation are opposite to each other, and a peripheral region of the second surface of the first insulating encapsulation is accessibly exposed by the metallic layer, wherein in a top view, the metallic layer comprises a rounded corner that corresponds to a corner at the intersection between two adjacent sides of the first insulating encapsulation, and a width of the peripheral region between sides of the metallic layer and the first insulating encapsulation is less than a width of the peripheral region between the corner of the first insulating encapsulation and the rounded corner of the metallic layer.

### Claim 2 (depends on 1)

The package structure of claim 1, wherein in the top view, a boundary of the metallic layer is encircled by a boundary of the first package component, and the boundary of the first package component is encircled by a boundary of the first underfill layer.

### Claim 3 (depends on 1)

The package structure of claim 1, wherein the width of the peripheral region between the sides of the metallic layer and the first insulating encapsulation is greater than a thickness of the metallic layer.

### Claim 4 (depends on 1)

The package structure of claim 1, wherein a top-view shape of the metallic layer is different from that of the first insulating encapsulation.

### Claim 5 (depends on 1)

The package structure of claim 1, wherein the first surfaces of the semiconductor dies and the first surface the first insulating encapsulation are substantially leveled, and the second surfaces of the semiconductor dies and the second surface the first insulating encapsulation are substantially leveled.

### Claim 6 (depends on 1)

The package structure of claim 1, wherein the first package component further comprises:
a bridge die underlying the redistribution structure and below adjacent two of the semiconductor dies, the bridge die being electrically coupled to the adjacent two of the semiconductor dies through the redistribution structure;
a second insulating encapsulation underlying the redistribution structure and covering the bridge die; and
through interlayer vias penetrating through the second insulating encapsulation and electrically coupled to the semiconductor dies through the redistribution structure.

### Claim 7 (depends on 6)

The package structure of claim 6, wherein the first package component further comprises:
a second underfill layer disposed between the bridge die and the redistribution structure, wherein a tapering direction of the second underfill layer is opposite to that of the first underfill layer in a cross-sectional view.

### Claim 8 (depends on 1)

The package structure of claim 1, further comprising:
a thermal interface material layer overlying the metallic layer and physically covering the peripheral region of the first insulating encapsulation; and
a heat dissipating component thermally coupled to the first package component through the metallic layer and the thermal interface material layer.

### Claim 9

A package structure, comprising:
a first package component comprising:
semiconductor dies, each of the semiconductor dies comprising a first surface and a second surface opposite to each other;
an insulating encapsulation laterally encapsulating the semiconductor dies; and
a redistribution structure underlying the first surfaces of the semiconductor dies and a first surface the insulating encapsulation, and the redistribution structure being electrically coupled to the semiconductor dies;
a second package component underlying the first package component and electrically coupled to the semiconductor dies through the redistribution structure;
an underfill layer disposed between the first and second package components and extending to cover a sidewall of the first package component; and
a metallic layer overlying the second surfaces of the semiconductor dies and a second surface of the insulating encapsulation, and the metallic layer further extending to cover the underfill layer wherein the metallic layer is in physical contact with a sidewall of the insulating encapsulation of the first package component and extends to be in physical contact with an outer surface of the underfill layer.

### Claim 10 (depends on 9)

The package structure of claim 9, wherein in a top view, a boundary of the first package component is encircled by a boundary of the metallic layer, and the boundary of the metallic layer is encircled by a boundary of the underfill layer.

### Claim 11 (depends on 9)

The package structure of claim 9, wherein in a top view, the metallic layer comprises a rounded corner that corresponds to a rounded corner of the underfill layer.

### Claim 12 (depends on 9)

The package structure of claim 9, wherein in a cross-sectional view, a width of the underfill layer measured from a sidewall of the first package component to an endpoint of the underfill layer on the second package component is greater than a width of the metallic layer measured from the sidewall of the first package component to an endpoint of the metallic layer on the underfill layer.

### Claim 13 (depends on 9)

The package structure of claim 9, wherein in a cross-sectional view, a thickness of the metallic layer overlying the underfill layer decreases from a corner of the first package component to an endpoint of the metallic layer on the underfill layer.

### Claim 14 (depends on 9)

The package structure of claim 9, wherein the underfill layer covers an entirety of a sidewall of the insulating encapsulation.

### Claim 15 (depends on 9)

The package structure of claim 9, wherein the first surfaces of the semiconductor dies and the first surface the first insulating encapsulation are substantially leveled.

### Claim 16 (depends on 9)

The package structure of claim 9, further comprising:
a thermal interface material layer disposed over the first package component and overlying the metallic layer, and the thermal interface material layer accessibly exposing at least a portion of the metallic layer on the underfill layer; and
a heat dissipating component thermally coupled to the first package component through the metallic layer and the thermal interface material layer.

### Claim 17

A package structure, comprising:
a first package component comprising:
semiconductor dies;
an insulating encapsulation laterally encapsulating the semiconductor dies; and
a second package component underlying the first package component and electrically coupled to the semiconductor dies;
an underfill layer disposed between the first and second package components; and
a metallic layer overlying rear surfaces of the semiconductor dies and a surface of the insulating encapsulation, wherein the surface of the insulating encapsulation and the rear surfaces of the semiconductor dies are substantially leveled with one another, and a peripheral region of the surface of the insulating encapsulation is accessibly exposed by the metallic layer, wherein in a top view, the metallic layer comprises a rounded corner that corresponds to a rounded corner of the underfill layer.

### Claim 18 (depends on 17)

The package structure of claim 17, wherein in the top view, a boundary of the metallic layer is encircled by a boundary of the first package component, and the boundary of the first package component is encircled by a boundary of the underfill layer.

### Claim 19 (depends on 17)

The package structure of claim 17, further comprising:
a thermal interface material layer overlying the metallic layer and the insulating encapsulation; and
a heat dissipating component thermally coupled to the first package component through the metallic layer and the thermal interface material layer.

### Claim 20 (depends on 17)

The package structure of claim 17, wherein in the top view, a curvature of the rounded corner of the metallic layer is different from a curvature of the rounded corner of the underfill layer.