# US 12,224,038 B2 · Memory device and intelligent operation method thereof > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,224,038 B2 - Document ID: US12224038B2 - Status: Granted - Kind: B2 - Application number: 18/191,903 - Filed: 2023-03-29 - Published: 2024-10-03 - Granted: 2025-02-11 - Earliest claimed: 2023-03-29 - Assignees: Macronix International Co., Ltd. - Applicants: Macronix International Co., Ltd. - Inventors: Kuan-Chih Chen; Chia-Hong Lee; Ming-Hsiu Lee - Web page: https://patentgrep.com/patent/US12224038B2 ## CPC - G11C 7/109: {Control signal input circuits} - G06N 3/063: using electronic means - G11C 7/04: with means for avoiding disturbances due to temperature effects - G11C 7/1012: {Data reordering during input/output, e.g. crossbars, layers of multiplexers, shifting or rotating} - G11C 11/54: using elements simulating biological cells, e.g. neuron - G11C 13/003: {Cell access} - G11C 13/004: {Reading or sensing circuits or methods} - G11C 13/0069: {Writing or programming circuits or methods} - G11C 16/10: Programming or data input circuits - G11C 16/26: Sensing or reading circuits; Data output circuits - G06N 3/044: Recurrent networks, e.g. Hopfield networks - G06N 3/0464: Convolutional networks [CNN, ConvNet] - G06N 3/048: Activation functions - G11C 2213/77: Array wherein the memory element being directly connected to the bit lines and word lines without any access device being used - G11C: STATIC STORES (semiconductor memory devices H10B) - G06N: COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS ## Abstract A memory device and an intelligent operation method thereof are provided. The memory device includes a memory array, a signal generating circuit, an environment detecting circuit and an artificial intelligence (AI) circuit. The signal generating circuit is configured to generate an inputting signal. The environment detecting circuit is configured to detect at least one environment information. The AI circuit is connected among the memory array, the signal generating circuit and the environment detecting circuit. The AI circuit at least receives the inputting signal from the signal generating circuit, receives the environment information from the environment detecting circuit, receives a first performance information from the memory array, receives a second performance information from the AI circuit and outputs an ideal signal to the memory array according to the inputting signal, the environment information, the first performance information and the second performance information. ## Claims ### Claim 1 A memory device, comprising: a memory array; a signal generating circuit, configured to generate an inputting signal; an environment detecting circuit, configured to detect at least one environment information; and an artificial intelligence (AI) circuit, connected among the memory array, the signal generating circuit and the environment detecting circuit, wherein the AI circuit at least receives the inputting signal from the signal generating circuit, receives the environment information from the environment detecting circuit, receives a first performance information from the memory array, receives a second performance information from the AI circuit and outputs an ideal signal to the memory array according to the inputting signal, the environment information, the first performance information and the second performance information. ### Claim 2 (depends on 1) The memory device according to claim 1, wherein the environment information is a thermal information, a pressure information or a humidity information. ### Claim 3 (depends on 1) The memory device according to claim 1, wherein the inputting signal is a program voltage, a read voltage or an erase voltage. ### Claim 4 (depends on 1) The memory device according to claim 1, wherein the AI circuit includes: a shrinking element, configured to shrink the inputting signal, the environment information and the performance information. ### Claim 5 (depends on 4) The memory device according to claim 4, wherein the shrinking element is a log operation circuit. ### Claim 6 (depends on 1) The memory device according to claim 1, wherein the AI circuit includes: a shifting element, configured to shift the inputting signal, the environment information, the first performance information and the second performance information. ### Claim 7 (depends on 1) The memory device according to claim 1, wherein the AI circuit includes: a normalizing element, configured to normalize the inputting signal, the environment information, the first performance information and the second performance information to a predetermined range. ### Claim 8 (depends on 7) The memory device according to claim 7, wherein the predetermined range is 0 to 1. ### Claim 9 (depends on 1) The memory device according to claim 1, wherein the AI circuit includes: an adjusting element, configured to adjust distributions and locations of the environment information, the inputting signal, the first performance information and the second performance information. ### Claim 10 (depends on 1) The memory device according to claim 1, wherein the AI circuit is an Affine Layer circuit, a ReLU circuit, a sigmoid circuit, a neural network (NN) circuit, a Recurrent neural network (RNN) circuit or a Convolutional neural network (CNN) circuit. ### Claim 11 An intelligent operation method of a memory device, comprising: generating an inputting signal; detecting at least one environment information; obtaining, by an artificial intelligence (AI) circuit, an ideal signal according to the inputting signal, the environment information, a first performance information and a second performance information, wherein the first performance information is obtained from a memory array, and the second performance information is feedback from the AI circuit; and inputting the ideal signal to the memory array. ### Claim 12 (depends on 11) The intelligent operation method of the memory device according to claim 11, wherein the environment information is a thermal information, a pressure information or a humidity information. ### Claim 13 (depends on 11) The intelligent operation method of the memory device according to claim 11, wherein the inputting signal is a program voltage, a read voltage or an erase voltage. ### Claim 14 (depends on 11) The intelligent operation method of the memory device according to claim 11, wherein in the step of obtaining the ideal signal, the inputting signal, the environment information, the first performance information and the second performance information are shrunk. ### Claim 15 (depends on 14) The intelligent operation method of the memory device according to claim 14, wherein the inputting signal, the environment information, the first performance information and the second performance information are shrunk via a log operation. ### Claim 16 (depends on 11) The intelligent operation method of the memory device according to claim 11, wherein in the step of obtaining the ideal signal, the inputting signal, the environment information, the first performance information and the second performance information are shifted. ### Claim 17 (depends on 11) The intelligent operation method of the memory device according to claim 11, wherein in the step of obtaining the ideal signal, the inputting signal, the environment information, the first performance information and the second performance information are normalized to a predetermined range. ### Claim 18 (depends on 17) The intelligent operation method of the memory device according to claim 17, wherein the predetermined range is 0 to 1. ### Claim 19 (depends on 11) The intelligent operation method of the memory device according to claim 11, wherein in the step of obtaining the ideal signal, distributions and locations of the environment information, the inputting signal, the first performance information and the second performance information are adjusted. ### Claim 20 (depends on 11) The intelligent operation method of the memory device according to claim 11, wherein the ideal signal is obtained by an artificial intelligence (AI) circuit.