Device for receiving single-ended signal of light emitting diode control card and forwarding as differential signals

A device for receiving a single-ended signal of an LED control card and forwarding as differential signals, comprising:

• a parsing unit, a control unit, an SRAM and a differential output unit;
• wherein
• the parsing unit is respectively connected with the control unit, the SRAM and the differential output unit, the control unit is respectively connected with the SRAM and the differential output unit, and the SRAM is connected with the differential output unit;
• the parsing unit is used for receiving and parsing data, latch and clock signals sent by the control card;
• the SRAM is used for storing display data of a parsing result;
• the control unit is used for processing commands of the parsing result, accessing the SRAM, modifying the display data transmitted by the parsing unit in the SRAM, and filling the SRAM for provision to a back end for output display;
• the control unit accesses the SRAM, modifies the display data transmitted by the parsing unit in the SRAM to optimize a display effect, or fills the SRAM for the provision to the back end for the output display when there is no control card to send the display data, and is used to test a function of an LED display screen without the control card;
• and
• the differential output unit is used for obtaining the differential signals based on a processing result of the control unit;
• the control unit comprises three groups of registers, 64 in each group, and each register is 8 bit in size;
• when the parsing unit receives a PRE_ACT command and a WR_REG command, values are written into registers of corresponding addresses, and the registers are written only after receiving the PRE_ACT command, otherwise a writing is not succeed, and an interrupt WR_IRQ is generated to an MCU core during the writing;
• in a WR_IRQ interrupt service, the values written into the registers are read by the control unit, processed and forwarded to the differential output unit, and are transmitted to the differential column driver chips through the differential signals;
• the differential output unit has three instruction FIFOs of R, G and B with a depth of 4, and each FIFO is 16 bit in size, wherein high 8 bits are target register addresses and low 8 bits are register values;
• instruction data written by the control unit is cached in the FIFOs;
• when there is data in the FIFOs, first written 16 bit data is taken out of the FIFOs by the differential output unit and output to SDO ports for transmission to the differential column driver chips;
• while outputting an instruction, a module reads the display data in the SRAM into data FIFOs;
• and
• there are 7 channels of differential output signals in total, SDO0-5, and a CLK clock with double edges, wherein SDO0-2 are a first group of RGB signals and SDO3-5 are a second group of RGB signals;
• and each signal needs two lines of + and − to form differential signals.