# US 12,224,017 B2 · Read level compensation for partially programmed blocks of memory devices > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,224,017 B2 - Document ID: US12224017B2 - Status: Granted - Kind: B2 - Application number: 17/942,977 - Filed: 2022-09-12 - Published: 2024-03-14 - Granted: 2025-02-11 - Earliest claimed: 2022-09-12 - Assignees: Micron Technology, Inc. - Applicants: Micron Technology, Inc. - Inventors: Nagendra Prasad Ganesh Rao; Paing Z. Htet; Sead Zildzic, Jr.; Thomas Fiala; Jian Huang; Zhenming Zhou - Web page: https://patentgrep.com/patent/US12224017B2 ## CPC - G11C 16/0483: {comprising cells having several storage transistors connected in series} - G11C 16/26: Sensing or reading circuits; Data output circuits - G11C 11/5642: {Sensing or reading circuits; Data output circuits} - G11C 16/08: Address circuits; Decoders; Word-line control circuits - G11C 16/16: for erasing blocks, e.g. arrays, words, groups - G11C: STATIC STORES (semiconductor memory devices H10B) ## Abstract A system can include a memory device containing blocks made up of wordlines respectively connected to sets of memory cells, and a processing device, operatively coupled with the memory device to perform operations including responsive to receiving a read request that specifies a block, determining a value of a metric reflective of a number of programmed wordlines of the block. The operations can also include responsive to determining, based on the value of the metric, that the block is in a partially programmed state, identifying a read voltage offset corresponding to the value of the metric, and performing, using the read voltage offset, a read operation responsive to the read request. ## Claims ### Claim 1 A system comprising: a memory device comprising a plurality of blocks, each block of the plurality of blocks comprising a plurality of wordlines, each wordline of the plurality of wordlines connected to a respective set of memory cells; and a processing device, operatively coupled with the memory device to perform operations comprising: responsive to receiving a read request that specifies a block, determining a value of a metric reflective of a number of programmed wordlines of the block; responsive to determining, based on the value of the metric, that the block is in a partially programmed state, identifying a read voltage offset corresponding to the value of the metric; and performing, using the read voltage offset, a read operation responsive to the read request. ### Claim 2 (depends on 1) The system of claim 1, wherein identifying the read voltage offset comprises: identifying, in a metadata structure, a record associating the value of the metric and the corresponding read voltage offset. ### Claim 3 (depends on 1) The system of claim 1, wherein determining whether the block is in a partially programmed state comprises: determining whether at least one wordline in the block is connected to a corresponding set of erased memory cells. ### Claim 4 (depends on 1) The system of claim 1, wherein determining the value of the metric comprises: identifying the value in a metadata structure. ### Claim 5 (depends on 4) The system of claim 4, wherein the metadata structure is stored in a local memory. ### Claim 6 (depends on 4) The system of claim 4, the metadata structure is stored on the memory device. ### Claim 7 (depends on 1) The system of claim 1, wherein the metric reflects a ratio of the number of programmed wordlines of the block to a total number of wordlines of the block. ### Claim 8 A method comprising: responsive to receiving a read request that specifies a block within a plurality of blocks of a memory device, determining a value of a metric reflective of a number of programmed wordlines of the block; responsive to determining, based on the value of the metric, that the block is in a partially programmed state, identifying a read voltage offset corresponding to the value of the metric; and performing, using the read voltage offset, a read operation responsive to the read request. ### Claim 9 (depends on 8) The method of claim 8, wherein identifying the read voltage offset comprises: identifying, in a metadata structure, a record associating the value of the metric and the corresponding read voltage offset. ### Claim 10 (depends on 8) The method of claim 8, wherein determining whether the block is in a partially programmed state comprises: determining whether at least one wordline in the block is connected to a corresponding set of erased memory cells. ### Claim 11 (depends on 8) The method of claim 8, wherein determining the value of the metric comprises: identifying the value in a metadata structure. ### Claim 12 (depends on 11) The method of claim 11, wherein the metadata structure is stored in a local memory. ### Claim 13 (depends on 11) The method of claim 11, wherein the metadata structure is stored on the memory device. ### Claim 14 (depends on 8) The method of claim 8, wherein the metric reflects a ratio of the number of programmed wordlines of the block to a total number of wordlines of the block. ### Claim 15 A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to perform operations comprising: receiving a read request that specifies a block within a plurality of blocks, the block comprising a plurality of wordlines on a memory device; responsive to receiving the read request, determining a value of a metric reflective of a number of programmed wordlines of the block; responsive to determining, based on the value of the metric, that the block is in a partially programmed state, identifying a read voltage offset corresponding to the value of the metric; and issuing, to the memory device, a read command comprising the read voltage offset. ### Claim 16 (depends on 15) The non-transitory computer-readable storage medium of claim 15, wherein identifying the read voltage offset comprises: identifying, in a metadata structure, a record associating the value of the metric and the corresponding read voltage offset. ### Claim 17 (depends on 15) The non-transitory computer-readable storage medium of claim 15, wherein determining whether the block is in a partially programmed state comprises: determining whether at least one wordline of the block is connected to a corresponding set of erased memory cells. ### Claim 18 (depends on 15) The non-transitory computer-readable storage medium of claim 15, wherein determining the value of the metric comprises: identifying the value in a metadata structure. ### Claim 19 (depends on 18) The non-transitory computer-readable storage medium of claim 18, wherein the metadata structure is stored in a local memory. ### Claim 20 (depends on 18) The non-transitory computer-readable storage medium of claim 18, wherein the metric is a count of programmed wordlines of the block.