# US 12,224,007 B2 · Method for determining a manufacturing parameter of a resistive random access memory cell

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- Number: US 12,224,007 B2
- Document ID: US12224007B2
- Status: Granted
- Kind: B2
- Application number: 17/618,250
- Filed: 2020-06-11
- Published: 2022-10-20
- Granted: 2025-02-11
- Earliest claimed: 2019-06-12
- Assignees: Commissariat A L'energie Atomique Et Aux Energies Alternatives; Weebit Nano Ltd.
- Applicants: Commissariat à L'éNergie Atomique Et Aux éNergies Alternatives; Weebit Nano Ltd
- Inventors: Gabriel Molas; Guiseppe Piccolboni; Amir Regev; Gaël Castellan; Jean-François Nodin
- Web page: https://patentgrep.com/patent/US12224007B2

## CPC

- G11C 13/0069: {Writing or programming circuits or methods}
- H10N 70/011: {Manufacture or treatment of multistable switching devices}
- H10N 70/026: {by physical vapor deposition, e.g. sputtering}
- H10N 70/20: Multistable switching devices, e.g. memristors
- H10N 70/826: {adapted for essentially vertical current flow, e.g. sandwich or pillar type devices}
- H10N 70/841: {Electrodes}
- H10N 70/883: {Oxides or nitrides}
- G11C: STATIC STORES (semiconductor memory devices H10B)
- H10N: ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR

## Abstract

A method for determining a value of a manufacturing parameter of a resistive memory cell, the resistive memory cell including a stack of layers, includes providing reference memory cells corresponding to technological alternatives of the stack of layers; measuring for each reference memory cell an initial resistance value; determining for each reference memory cell a programming parameter value selected from among the resistance in a high resistance state and the programming window; establishing a relationship between the programming parameter and the initial resistance from the initial resistance values and the programming parameter values; and determining the manufacturing parameter value for which the programming parameter is greater than or equal to a target value, from the relationship between the programming parameter and the initial resistance and from a dependency relationship between the initial resistance and the manufacturing parameter.

## Claims

### Claim 1

A method for determining at least one value of at least one manufacturing parameter of a resistive memory cell, the resistive memory cell comprising a stack of thin layers, said method comprising:
providing several reference memory cells corresponding to several technological alternatives of the stack of thin layers;
measuring for each reference memory cell an initial resistance value;
determining for each reference memory cell a programming parameter value selected from among the resistance in a high resistance state and a programming window;
establishing an equation that defines a relationship between the programming parameter and the initial resistance from the initial resistance values and from the programming parameter values; and
after establishing said relationship, determining said at least one value of said at least one manufacturing parameter for which the programming parameter is greater than or equal to a target value, from said relationship between the programming parameter and the initial resistance and from at least one dependency relationship between the initial resistance and said at least one manufacturing parameter.

### Claim 2 (depends on 1)

The method according to claim 1, comprising:
determining, from said relationship between the programming parameter and the initial resistance, at least one initial resistance value for which the programming parameter is greater than or equal to the target value; and
after determining said at least one initial resistance value for which the programming parameter is greater than or equal to the target value, determining said at least one value of said at least one manufacturing parameter from said at least one initial resistance value.

### Claim 3 (depends on 1)

The method according to claim 1, wherein the programming parameter is the resistance in the high resistance state and wherein the determining of the values of the programming parameter comprises the following operations:
programming the reference memory cells in the high resistance state;
measuring for each reference memory cell a resistance value in the high resistance state.

### Claim 4 (depends on 3)

The method according to claim 3, wherein the resistance in the high resistance state is a second degree polynomial function of the logarithm of the initial resistance.

### Claim 5 (depends on 1)

The method according to claim 1, wherein the programming parameter is the programming window and wherein the determining of the values of the programming parameter comprises the following operations:
programming the reference memory cells in a low resistance state;
measuring for each reference memory cell a resistance value in the low resistance state;
programming the reference memory cells in the high resistance state;
measuring for each reference memory cell a resistance value in the high resistance state; and
calculating for each reference memory cell a programming window value from the measured resistance values in the low resistance state and the resistance in the high resistance state.

### Claim 6 (depends on 1)

The method according to claim 1, wherein the stack of thin layers comprises a first electrode arranged on a substrate, an oxide layer arranged on the first electrode and a second electrode arranged on the oxide layer and wherein said at least one manufacturing parameter is selected from among a thickness of the second electrode, a thickness of the oxide layer and a proportion of oxygen in the oxide layer.

### Claim 7 (depends on 1)

The method for manufacturing a resistive memory cell, comprising:
determining a value of at least one manufacturing parameter, by following a method according to claim 1;
forming on a substrate a stack successively comprising a first electrode, an oxide layer and a second electrode, by applying the value of said at least one manufacturing parameter.

### Claim 8 (depends on 7)

The method according to claim 7, wherein the oxide layer is formed of a sub-stoichiometric silicon oxide.

### Claim 9 (depends on 7)

The method according to claim 7, wherein the oxide layer is formed of a porous silicon oxide.

### Claim 10 (depends on 7)

The method according to claim 7, wherein the first electrode is made of titanium nitride and the second electrode is made of titanium.
