# US 12,223,909 B2 · Pixel drive circuit, display panel and display device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,223,909 B2 - Document ID: US12223909B2 - Status: Granted - Kind: B2 - Application number: 18/282,242 - Filed: 2021-11-23 - Published: 2024-05-16 - Granted: 2025-02-11 - Earliest claimed: 2021-03-25 - Assignees: Chengdu Boe Optoelectronics Technology Co., Ltd.; Boe Technology Group Co., Ltd. - Applicants: Chengdu BOE Optoelectronics Technology Co., Ltd.; BOE Technology Group Co., Ltd. - Inventors: Tingliang Liu; Huijuan Yang; Linhong Han; Xiaoqing Shu; Maoying Liao; Xiangdan Dong - Web page: https://patentgrep.com/patent/US12223909B2 ## CPC - G09G 3/3233: with pixel circuitry controlling the current through the light-emitting element - G09G 3/3258: with pixel circuitry controlling the voltage across the light-emitting element - H10K 59/131: Interconnections, e.g. wiring lines or terminals - G09G 2300/0426: Layout of electrodes and connections - G09G 2300/0819: used for counteracting undesired variations, e.g. feedback or autozeroing - G09G 2300/0842: forming a memory circuit, e.g. a dynamic memory with one capacitor - G09G 2300/0861: with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes - G09G 2310/0251: Precharge or discharge of pixel before applying new pixel voltage - G09G 2320/0233: Improving the luminance or brightness uniformity across the screen - G09G 2320/0242: Compensation of deficiencies in the appearance of colours - G09G 2320/0626: for control of overall brightness - G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00) - H10K: ORGANIC ELECTRIC SOLID-STATE DEVICES ## Abstract A pixel driving circuit includes: a driving transistor connected to a first node, a second node and a third node; a first light-emitting control unit connected to the second node; a second light-emitting control unit connected to the third node and a fourth node; a first reset unit connected to the fourth node, and configured to load a second power supply voltage to the fourth node in response to a scan signal. One end of the light-emitting element is connected to the fourth node, and the other end of the light-emitting element is used for loading the second power supply voltage. ## Claims ### Claim 1 A pixel driving circuit, comprising: a driving transistor connected to a first node, a second node and a third node, and configured to output a driving current to the third node under control of the first node; a storage capacitor, comprising one terminal connected to the first node; a data writing circuit, connected to the second node, and configured to load a data voltage to the second node in response to a scan signal; a threshold compensation circuit, connected to the first node and the third node, and configured to conduct the first node and the third node in response to the scan signal; a first light emitting control circuit, connected to the second node, and configured to apply a first power supply voltage to the second node in response to a light emitting control signal; a second light emitting control circuit, connected to the third node and a fourth node, and configured to conduct the third node and the fourth node in response to the light emitting control signal; a first reset circuit, connected to the fourth node, and configured to apply a second power supply voltage to the fourth node in response to the scan signal; and a light emitting element, one terminal of the light emitting element is connected to the fourth node, and the other terminal is configured to load the second power supply voltage, wherein the pixel driving circuit comprises a first power supply lead configured to load the first power supply voltage and a second power supply lead configured to load the second power supply voltage, wherein the first power supply lead comprises a first part extending in a first direction and a second part extending in a second direction, and the first part and the second part are formed in different conductive lavers and are interconnected to form a grid shaped electrode; and wherein the second power supply lead comprises a first part extending in the first direction and a second part extending in the second direction, and the first part and the second part are formed in different conductive layers and are interconnected to form a grid shaped electrode. ### Claim 2 (depends on 1) The pixel driving circuit according to claim 1, wherein, the data writing circuit comprises a data writing transistor, the data writing transistor has a first terminal, a second terminal and a control terminal, the first terminal of the data writing transistor is configured to load the data voltage, the second terminal of the data writing transistor is connected to the second node, and the control terminal of the data writing transistor is configured to load the scan signal; the threshold compensation circuit comprises a threshold compensation transistor, the threshold compensation transistor has a first terminal, a second terminal and a control terminal, the first terminal of the threshold compensation transistor is connected to the first node, the second terminal of the threshold compensation transistor is connected to the third node, and the control terminal of the threshold compensation transistor is configured to load the scan signal; the first light emitting control circuit comprises a first light emitting control transistor, the first light emitting control transistor has a first terminal, a second terminal and a control terminal, and the first terminal of the first light emitting control transistor is configured to load the first power supply voltage, the second terminal of the first light emitting control transistor is connected to the second node, and the control terminal of the first light emitting control transistor is configured to load the light emitting control signal; the second light emitting control circuit comprises a second light emitting control transistor, the second light emitting control transistor has a first terminal, a second terminal and a control terminal, and the first terminal of the second light emitting control transistor is connected to the third node, the second terminal of the second light emitting control transistor is connected to the fourth node, and the control terminal of the second light emitting control transistor is configured to load the light emitting control signal; and the first reset circuit comprises a first reset transistor, the first reset transistor has a first terminal, a second terminal and a control terminal, the first terminal of the first reset transistor is configured to load the second power supply voltage, the second terminal of the first reset transistor is connected to the fourth node, and the control terminal of the first reset transistor is configured to load the scan signal. ### Claim 3 (depends on 1) The pixel driving circuit according to claim 1, wherein the pixel driving circuit further comprises a second reset circuit, connected to the first node and configured to apply an initialization voltage to the first node in response to a reset signal. ### Claim 4 A display panel, comprising a pixel driving circuit, wherein the pixel driving circuit comprises: a driving transistor connected to a first node, a second node and a third node, and configured to output a driving current to the third node under control of the first node; a storage capacitor, comprising one terminal connected to the first node; a data writing circuit, connected to the second node, and configured to load a data voltage to the second node in response to a scan signal; a threshold compensation circuit, connected to the first node and the third node, and configured to conduct the first node and the third node in response to the scan signal; a first light emitting control circuit, connected to the second node, and configured to apply a first power supply voltage to the second node in response to a light emitting control signal; a second light emitting control circuit, connected to the third node and a fourth node, and configured to conduct the third node and the fourth node in response to the light emitting control signal; a first reset circuit, connected to the fourth node, and configured to apply a second power supply voltage to the fourth node in response to the scan signal; and a light emitting element, one terminal of the light emitting element is connected to the fourth node, and the other terminal is configured to load the second power supply voltage, wherein the pixel driving circuit comprises a first power supply lead configured to load the first power supply voltage and a second power supply lead configured to load the second power supply voltage, wherein the first power supply lead comprises a first part extending in a first direction and a second part extending in a second direction, and the first part and the second part are formed in different conductive layers and are interconnected to form a grid shaped electrode; and wherein the second power supply lead comprises a first part extending in the first direction and a second part extending in the second direction, and the first part and the second part are formed in different conductive lavers and are interconnected to form a grid shaped electrode. ### Claim 5 (depends on 4) The display panel according to claim 4, wherein the display panel comprises a display area and a peripheral area surrounding the display area; and the second power supply lead is formed in the display area, and the second power supply lead is electrically connected to the fourth node of the pixel driving circuit. ### Claim 6 (depends on 5) The display panel according to claim 5, wherein a number of the second power supply lead is plural, and wherein the first direction is a row direction and the second direction is a column direction. ### Claim 7 (depends on 5) The display panel according to claim 5, wherein the peripheral area comprises a second power supply bus, and the second power supply bus is connected to at least part of the second power lead. ### Claim 8 (depends on 7) The display panel according to claim 7, wherein the peripheral area has a binding area; the second power supply bus has a wiring segment and a connecting segment connected to each other; a number of the second power supply bus is two, the wiring segments of the two second power supply buses are all extend along the column direction and are respectively located on two sides of the display area; and the connecting segment of the second power supply bus extends to the bonding area. ### Claim 9 (depends on 8) The display panel according to claim 8, wherein the wiring segment of the second power supply bus is located at an end of the display panel close to the bonding area. ### Claim 10 (depends on 5) The display panel according to claim 5, wherein the pixel driving circuit comprises a second reset circuit, and the peripheral area of the display panel comprises a binding area; the display panel is further configured with: an initialization bus, configured to load the initialization voltage; a number of the initialization bus is two and are disposed in the peripheral area, and the initialization bus comprises a wiring segment and a connecting segment connected to each other; the wiring segments of the two initialization buses are all extend along the column direction and are respectively located on two sides of the display area; and the connecting segment of the initialization bus extends to the bonding area; an initialization lead, running through the display area along a row direction and connected to the wiring segment of the initialization bus; a first power supply bus, configured to load the first power supply voltage; a number of the first power supply buses is two and are disposed in the peripheral area, one terminal of the first power supply bus is extended to the bonding area; and the first power lead are arranged in the display area, and is connected to the first power supply bus; wherein the first power supply bus is partially overlapped with the initialization bus. ### Claim 11 A display device, comprising a display panel, wherein the display panel comprises a pixel driving circuit which comprises: a driving transistor connected to a first node, a second node and a third node, and configured to output a driving current to the third node under control of the first node; a storage capacitor, comprising one terminal connected to the first node; a data writing circuit, connected to the second node, and configured to load a data voltage to the second node in response to a scan signal; a threshold compensation circuit, connected to the first node and the third node, and configured to conduct the first node and the third node in response to the scan signal; a first light emitting control circuit, connected to the second node, and configured to apply a first power supply voltage to the second node in response to a light emitting control signal; a second light emitting control circuit, connected to the third node and a fourth node, and configured to conduct the third node and the fourth node in response to the light emitting control signal; a first reset circuit, connected to the fourth node, and configured to apply a second power supply voltage to the fourth node in response to the scan signal; and a light emitting element, one terminal of the light emitting element is connected to the fourth node, and the other terminal is configured to load the second power supply voltage, wherein the pixel driving circuit comprises a first power supply lead configured to load the first power supply voltage and a second power supply lead configured to load the second power supply voltage, wherein the first power supply lead comprises a first part extending in a first direction and a second part extending in a second direction, and the first part and the second part are formed in different conductive layers and are interconnected to form a grid shaped electrode; and wherein the second power supply lead comprises a first part extending in the first direction and a second part extending in the second direction, and the first part and the second part are formed in different conductive layers and are interconnected to form a grid shaped electrode. ### Claim 12 (depends on 11) The display device according to claim 11, wherein, the data writing circuit comprises a data writing transistor, the data writing transistor has a first terminal, a second terminal and a control terminal, the first terminal of the data writing transistor is configured to load the data voltage, the second terminal of the data writing transistor is connected to the second node, and the control terminal of the data writing transistor is configured to load the scan signal; the threshold compensation circuit comprises a threshold compensation transistor, the threshold compensation transistor has a first terminal, a second terminal and a control terminal, the first terminal of the threshold compensation transistor is connected to the first node, the second terminal of the threshold compensation transistor is connected to the third node, and the control terminal of the threshold compensation transistor is configured to load the scan signal; the first light emitting control circuit comprises a first light emitting control transistor, the first light emitting control transistor has a first terminal, a second terminal and a control terminal, and the first terminal of the first light emitting control transistor is configured to load the first power supply voltage, the second terminal of the first light emitting control transistor is connected to the second node, and the control terminal of the first light emitting control transistor is configured to load the light emitting control signal; the second light emitting control circuit comprises a second light emitting control transistor, the second light emitting control transistor has a first terminal, a second terminal and a control terminal, and the first terminal of the second light emitting control transistor is connected to the third node, the second terminal of the second light emitting control transistor is connected to the fourth node, and the control terminal of the second light emitting control transistor is configured to load the light emitting control signal; and the first reset circuit comprises a first reset transistor, the first reset transistor has a first terminal, a second terminal and a control terminal, the first terminal of the first reset transistor is configured to load the second power supply voltage, the second terminal of the first reset transistor is connected to the fourth node, and the control terminal of the first reset transistor is configured to load the scan signal. ### Claim 13 (depends on 11) The display device according to claim 11, wherein the pixel driving circuit further comprises a second reset circuit, connected to the first node and configured to apply an initialization voltage to the first node in response to a reset signal. ### Claim 14 (depends on 11) The display device according to claim 11, wherein the display panel comprises a display area and a peripheral area surrounding the display area; and the second power supply lead is formed in the display area, and the second power supply lead is electrically connected to the fourth node of the pixel driving circuit. ### Claim 15 (depends on 14) The display device according to claim 14, wherein a number of the second power supply lead is plural, and wherein the first direction is a row direction and the second direction is a column direction. ### Claim 16 (depends on 14) The display device according to claim 14, wherein the peripheral area comprises a second power supply bus, and the second power supply bus is connected to at least part of the second power lead. ### Claim 17 (depends on 16) The display device according to claim 16, wherein the peripheral area has a binding area; the second power supply bus has a wiring segment and a connecting segment connected to each other; a number of the second power supply bus is two, the wiring segments of the two second power supply buses are all extend along the column direction and are respectively located on two sides of the display area; and the connecting segment of the second power supply bus extends to the bonding area. ### Claim 18 (depends on 17) The display device according to claim 17, wherein the wiring segment of the second power supply bus is located at an end of the display panel close to the bonding area.