# US 12,223,899 B2 · Display device and method for operating pixels of the display device

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- Number: US 12,223,899 B2
- Document ID: US12223899B2
- Status: Granted
- Kind: B2
- Application number: 18/214,845
- Filed: 2023-06-27
- Published: 2024-01-04
- Granted: 2025-02-11
- Earliest claimed: 2022-06-30
- Assignees: LG Display Co., Ltd.
- Applicants: LG Display Co., Ltd.
- Inventors: Haksu Kim; Hwanjoo Lee
- Web page: https://patentgrep.com/patent/US12223899B2

## CPC

- G09G 3/3233: with pixel circuitry controlling the current through the light-emitting element
- G09G 2300/0819: used for counteracting undesired variations, e.g. feedback or autozeroing
- G09G 2300/0842: forming a memory circuit, e.g. a dynamic memory with one capacitor
- G09G 2300/0861: with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
- G09G 2310/0213: controlling the sequence of the scanning lines with respect to the patterns to be displayed, e.g. to save power
- G09G 2310/0251: Precharge or discharge of pixel before applying new pixel voltage
- G09G 2310/0262: The addressing of the pixel, in a display other than an active matrix LCD, involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependent on signals of two data electrodes
- G09G 2310/0297: Special arrangements with multiplexing or demultiplexing of display data in the drivers for data electrodes, in a pre-processing circuitry delivering display data to said drivers or in the matrix panel, e.g. multiplexing plural data signals to one D/A converter or demultiplexing the D/A converter output to multiple columns
- G09G 2310/08: Details of timing specific for flat panels, other than clock recovery
- G09G 2320/0233: Improving the luminance or brightness uniformity across the screen
- G09G 2320/045: Compensation of drifts in the characteristics of light emitting or modulating elements
- G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00)

## Abstract

Disclosed are a display device and a method for operating pixels of the display device. The display device comprises: a light-emitting element; and a pixel circuit configured to control the light-emitting element, wherein the pixel circuit includes: a capacitor connected to and disposed between a first node and a second node; and a driving transistor including a gate electrode connected to the second node; a first electrode receiving a high-potential driving voltage; and a second electrode connected to a third node, wherein the pixel circuit is configured such that the same voltage is supplied to the first node and the second node during at least a portion of an operation period of the pixel circuit. Thus, occurrence of a reference voltage related short-circuit in the light-emitting element of the pixel circuit is suppressed to prevent occurrence of defective image display in each pixel and to improve reliability thereof.

## Claims

### Claim 1

A display device comprising:
a display panel in which a plurality of pixels are disposed;
a data driver supplying a data voltage to the plurality of pixels; and
a demultiplexer unit is disposed between the data driver and a display area of the display panel,
wherein each of the plurality of pixels includes:
a light-emitting element; and
a pixel circuit configured to control the light-emitting element,
wherein the pixel circuit includes:
a capacitor connected to and disposed between a first node and a second node; and
a driving transistor including a gate electrode connected to the second node, a first electrode receiving a driving voltage, and a second electrode connected to a third node,
wherein the pixel circuit is configured such that a reference voltage is supplied to the first node and the second node during a portion of an operation period of the pixel circuit,
wherein the demultiplexer unit distribute a data voltage output from one channel of the data driver in a time division manner and supplies to the plurality of pixels.

### Claim 2 (depends on 1)

The display device of claim 1, wherein a first transistor and a second transistor are respectively connected to both opposing ends of the capacitor,
wherein the pixel circuit is configured to initialize the capacitor using at least one of the first transistor and the second transistor.

### Claim 3 (depends on 1)

The display device of claim 1, wherein the operation period includes an initialization period, a sampling period, a holding period, and a light-emission period,
wherein each of the initialization period, the sampling period, the holding period, and the light-emission period is separately activated based on:
a first scan signal;
a second scan signal having the same pulse width as a pulse width of the first scan signal, and a different phase from a phase of the first scan signal;
a third scan signal having a different pulse width from the pulse width of each of the first scan signal and the second scan signal; and
a light-emission control signal.

### Claim 4 (depends on 3)

The display device of claim 3, wherein the pulse width of the first scan signal and the second scan signal is smaller than the pulse width of the third scan signal.

### Claim 5 (depends on 3)

The display device of claim 3, wherein the light-emission control signal includes:
a first light-emission control signal; and
a second light-emission control signal having a different phase from a phase of the first light-emission control signal.

### Claim 6 (depends on 5)

The display device of claim 5, wherein a pulse width of the first light-emission control signal is equal to a pulse width of the second light-emission control signal.

### Claim 7 (depends on 5)

The display device of claim 5, wherein a pulse width of the first light-emission control signal is different than a pulse width of the second light-emission control signal.

### Claim 8 (depends on 3)

The display device of claim 3, wherein, during the initialization period, the pixel circuit is configured to supply a first reference voltage to the first node and supply a second reference voltage to the second node.

### Claim 9 (depends on 8)

The display device of claim 8, wherein the first reference voltage and the second reference voltage have the same or different voltage levels.

### Claim 10 (depends on 3)

The display device of claim 3, wherein the first scan signal and the second scan signal have a pulse width of less than 1 horizontal period.

### Claim 11 (depends on 3)

The display device of claim 3, wherein the pixel circuit further includes:
a third transistor connected to and disposed between the second node and the third node, wherein the third transistor is turned on in response to the third scan signal to connect the gate electrode and a drain electrode of the driving transistor to form a diode path using the driving transistor;
a fourth transistor turned on in response to the light-emission control signal to electrically connect the driving transistor to the light-emitting element; and
a fifth transistor turned on in response to the third scan signal to initialize the light-emitting element.

### Claim 12 (depends on 1)

The display device of claim 1, wherein the driving transistor includes a plurality of sub-transistors.

### Claim 13

A display device comprising:
a display panel in which a plurality of data lines, a plurality of scan lines, a plurality of light-emission control lines, and a plurality of pixels are disposed;
a gate driver sequentially supplying a scan signal to the plurality of scan lines and sequentially supplying a light-emission control signal to the plurality of light-emission control lines;
a data driver supplying a data voltage to the plurality of data lines;
a demultiplexer unit is disposed between the data driver and a display area of the display panel; and
a controller for controlling the gate driver and the data driver,
wherein each of the plurality of pixels includes:
a light-emitting element; and
a pixel circuit configured to control the light-emitting element,
wherein the pixel circuit includes:
a capacitor connected to and disposed between a first node and a second node; and
a driving transistor including a gate electrode connected to the second node; a first electrode receiving a first driving voltage; and a second electrode connected to a third node,
wherein the pixel circuit is configured such that a reference voltage is supplied to the first node and the second node during a portion of an operation period of the pixel circuit,
wherein the demultiplexer unit distribute a data voltage output from one channel of the data driver in a time division manner and supplies to the plurality of pixels.

### Claim 14 (depends on 13)

The display device of claim 13, wherein the operation period includes an initialization period, a sampling period, a holding period, and a light-emission period,
wherein each of the initialization period, the sampling period, the holding period, and the light-emission period is separately activated based on:
a first scan signal;
a second scan signal having the same pulse width as a pulse width of the first scan signal, and a different phase from a phase of the first scan signal;
a third scan signal having a different pulse width from the pulse width of each of the first scan signal and the second scan signal; and
the light-emission control signal.

### Claim 15 (depends on 13)

The display device of claim 13, wherein the display panel has a shape in which at least a portion of one side of the display panel is recessed inwardly in a plan view of the display panel.

### Claim 16 (depends on 13)

The display device of claim 13, wherein the display panel has a shape in which at least a portion of one side of the display panel is recessed inwardly of a remaining portion of the side by a first length in a plan view of the display panel.
