# US 12,223,892 B2 · Pixel circuit and display panel > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,223,892 B2 - Document ID: US12223892B2 - Status: Granted - Kind: B2 - Application number: 17/623,196 - Filed: 2021-12-17 - Published: 2024-02-08 - Granted: 2025-02-11 - Earliest claimed: 2021-12-09 - Assignees: Wuhan China Star Optoelectronics Semiconductor Display Technology Co., Ltd. - Applicants: Wuhan China Star Optoelectronics Semiconductor Display Technology Co., Ltd. - Inventors: Mian Zeng; Liang Sun - Web page: https://patentgrep.com/patent/US12223892B2 ## CPC - G09G 3/3233: with pixel circuitry controlling the current through the light-emitting element - G09G 3/32: semiconductive, e.g. using light-emitting diodes [LED] - G09G 2300/0819: used for counteracting undesired variations, e.g. feedback or autozeroing - G09G 2300/0842: forming a memory circuit, e.g. a dynamic memory with one capacitor - G09G 2300/0852: being a dynamic memory with more than one capacitor - G09G 2300/0861: with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes - G09G 2310/0251: Precharge or discharge of pixel before applying new pixel voltage - G09G 2310/0262: The addressing of the pixel, in a display other than an active matrix LCD, involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependent on signals of two data electrodes - G09G 2310/08: Details of timing specific for flat panels, other than clock recovery - G09G 2320/0233: Improving the luminance or brightness uniformity across the screen - G09G 2320/0247: Flicker reduction other than flicker reduction circuits used for single beam cathode-ray tubes - G09G 2320/045: Compensation of drifts in the characteristics of light emitting or modulating elements - G09G 2340/0435: Change or adaptation of the frame rate of the video stream - G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00) ## Abstract Disclosed are a pixel circuit and a display panel. The pixel circuit includes a Light emitting device, a Data signal write-in module, a Driving transistor, a Compensation module, a First initialization module, and a Light emitting control module. The first initialization module is electrically connected to the compensation module and electrically connected to the gate of the driving transistor through the compensation module. When the voltage level of the gate of the driving transistor, the number of the transistors connected to the driving transistor could be reduced. ## Claims ### Claim 1 A pixel circuit, comprising: a light emitting device, having two ends electrically connected to a first power signal and a second power signal; a data signal write-in module, configured to output a data signal in response to a first scan signal; a driving transistor, having a first electrode electrically connected to the data signal write-in module; a compensation module, electrically connected to a second electrode of the driving transistor and a gate of the driving transistor, configured to receive a second scan signal and the first power signal; a first initialization module, electrically connected to the compensation module, configured to receive a third scan signal and a first initialization signal; and a light emitting control module, connected in series between the first power signal and the second power signal, configured to receive a light emitting control signal; wherein the pixel circuit has a first working mode and a second working mode, and a display frequency of the first working mode is greater than a display frequency of the second working mode; and wherein the first initialization signal is a DC signal in the first working mode and the first initialization signal is an AC signal in the second working mode. ### Claim 2 (depends on 1) The pixel circuit of claim 1, wherein the data signal write-in module comprises a first transistor, having a gate receiving the first scan signal, a first electrode receiving the data signal, and a second electrode electrically connected to the first electrode of the driving transistor. ### Claim 3 (depends on 1) The pixel circuit of claim 1, wherein the compensation module comprises: a first capacitor, having two ends electrically connected to the gate of the driving transistor and the first power signal; and a second transistor, having a gate receiving the second scan signal, a first electrode electrically connected to the gate of the driving transistor, and a second electrode electrically connected to the driving transistor. ### Claim 4 (depends on 3) The pixel circuit of claim 3, wherein the first initialization module is electrically connected to the second electrode of the driving transistor. ### Claim 5 (depends on 3) The pixel circuit of claim 3, wherein the second transistor is a double-gate transistor, having a first gate and a second gate both receiving the second scan signal. ### Claim 6 (depends on 5) The pixel circuit of claim 5, further comprising: a second capacitor, having an end electrically connected to a transistor node of the second transistor, and another end receiving the light emitting control signal. ### Claim 7 (depends on 5) The pixel circuit of claim 5, wherein the first initialization module is electrically connected to the second electrode of the second transistor. ### Claim 8 (depends on 1) The pixel circuit of claim 1, wherein the first initialization module comprises a third transistor, having a gate receiving the third scan signal, a first electrode receiving the first initialization signal, and a second electrode electrically connected to the second electrode of the driving transistor. ### Claim 9 (depends on 1) The pixel circuit of claim 1, wherein the light emitting control module comprises a first light emitting control unit and a second light emitting control unit; the first light emitting control unit comprises a fourth transistor; and the second light emitting control unit comprises a fifth transistor; wherein a gate of the fourth transistor and a gate of the fifth transistor both receive the light emitting control signal, a first electrode of the fourth transistor receives the first power signal, a second electrode of the fourth transistor is electrically connected to the first electrode of the driving transistor; a first electrode of the fifth transistor is electrically connected to a positive electrode of the light emitting device, and the second electrode of the fifth transistor is electrically connected to the second electrode of the driving transistor. ### Claim 10 (depends on 1) The pixel circuit of claim 1, further comprising: a second initialization module, electrically connected to a positive electrode of the light emitting control device and receiving the first scan signal, configured to initialize a voltage level of the positive electrode of the light emitting device under a control of the first scan signal; wherein the second initialization module comprises a sixth transistor, having a gate receiving the first scan signal, a first electrode electrically connected to the positive electrode of the light emitting device, and a second electrode receiving the second initialization signal. ### Claim 11 A pixel circuit, comprising: a first transistor, having a gate receiving a first scan signal and a source receiving a data signal; a driving transistor, having a source electrically connected to a drain of the first transistor; a second transistor, having a first gate and a second gate receiving a second scan signal, a source electrically connected to a drain of the driving transistor, and a drain electrically connected to a gate of the driving transistor; a third transistor, having a gate receiving a third scan signal, a source receiving a first initialization signal, and a drain electrically connected to the drain of the second transistor; a fourth transistor, having a gate receiving a light emitting control signal, a source receiving a first power signal and a drain electrically connected to the source of the driving transistor; a fifth transistor, having a gate receiving the light emitting control signal and a source electrically connected to the drain of the driving transistor; a first capacitor, having an end electrically connected to the gate of the driving transistor, and another end receiving a first power signal; and a light emitting device, having a positive electrode electrically connected to a drain of the fifth transistor, and a second electrode receiving a second power signal; wherein the pixel circuit has a first working mode and a second working mode, and a display frequency of the first working mode is greater than a display frequency of the second working mode; and wherein the first initialization signal is a DC signal in the first working mode and the first initialization signal is an AC signal in the second working mode. ### Claim 12 (depends on 11) The pixel circuit of claim 11, further comprising: a second capacitor, having an end electrically connected to a transistor node of the second transistor, and another end receiving the light emitting control signal. ### Claim 13 (depends on 12) The pixel circuit of claim 12, further comprising: a sixth transistor, having a gate receiving the first scan signal, a source receiving a second initialization signal, and a drain connected to the positive electrode of the light emitting device. ### Claim 14 A display panel, comprising a plurality of pixel units arranged in an array, each of the pixel units comprising a pixel circuit, the pixel circuit comprising: a first transistor, having a gate receiving a first scan signal and a source receiving a data signal; a driving transistor, having a source electrically connected to a drain of the first transistor; a second transistor, having a first gate and a second gate receiving a second scan signal, a source electrically connected to a drain of the driving transistor, and a drain electrically connected to a gate of the driving transistor; a third transistor, having a gate receiving a third scan signal, a source receiving a first initialization signal, and a drain electrically connected to the drain of the second transistor; a fourth transistor, having a gate receiving a light emitting control signal, a source receiving a first power signal and a drain electrically connected to the source of the driving transistor; a fifth transistor, having a gate receiving the light emitting control signal and a source electrically connected to the drain of the driving transistor; a first capacitor, having an end electrically connected to the gate of the driving transistor, and another end receiving a first power signal; and a light emitting device, having a positive electrode electrically connected to a drain of the fifth transistor, and a second electrode receiving a second power signal; wherein the pixel circuit has a first working mode and a second working mode, and a display frequency of the first working mode is greater than a display frequency of the second working mode; and wherein the first initialization signal is a DC signal in the first working mode and the first initialization signal is an AC signal in the second working mode. ### Claim 15 (depends on 14) The display panel of claim 14, wherein the pixel circuit further comprises: a second capacitor, having an end electrically connected to a transistor node of the second transistor, and another end receiving the light emitting control signal. ### Claim 16 (depends on 15) The display panel of claim 15, wherein the pixel circuit further comprises: a sixth transistor, having a gate receiving the first scan signal, a source receiving a second initialization signal, and a drain connected to the positive electrode of the light emitting device.