# US 12,223,308 B2 · Methods and apparatus to perform a pseudo-S3 protocol to update firmware and/or activate new firmware with a warm reset > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,223,308 B2 - Document ID: US12223308B2 - Status: Granted - Kind: B2 - Application number: 18/040,147 - Filed: 2020-08-25 - Published: 2023-09-28 - Granted: 2025-02-11 - Earliest claimed: 2020-08-25 - Assignees: Intel Corporation - Applicants: Intel Corporation - Inventors: Mohan Kumar; Sarathy Jayakumar; Brett Peng Wang; Ashok Raj; Murugasamy Nachimuthu - Web page: https://patentgrep.com/patent/US12223308B2 ## CPC - G06F 8/65: Updates (security arrangements therefor G06F21/57) - G06F 9/4418: {Suspend and resume; Hibernate and awake} - G06F 9/4401: Bootstrapping (security arrangements therefor G06F21/57) - G06F 9/4403: {Processor initialisation} - G06F 9/4406: {Loading of operating system} - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract Methods, apparatus, systems, and articles of manufacture to perform a pseudo-S3 protocol to update firmware and/or activate new firmware with a warm reset are disclosed. An example apparatus includes an advanced configuration and power interface (ACPI) to: initiate a pseudo-sleep event in response to identifying a firmware update; and assert a power button event, the power button event to cause an operating system (OS) to prepare to enter into a sleep state; a basic input/output system (BIOS) to: initiate a warm reset in response to the OS preparing to enter the sleep state, the warm reset to update firmware according to the firmware update; and transmit a wake vector to the OS to continue operation. ## Claims ### Claim 1 An apparatus comprising: an advanced configuration and power interface (ACPI) to: initiate a pseudo-sleep event in response to identifying a firmware update; and assert a power button event, the power button event to cause an operating system (OS) to prepare to enter into a sleep state; and a basic input/output system (BIOS) to: initiate a warm reset in response to the OS preparing to enter the sleep state, the warm reset to update firmware according to the firmware update without entering the sleep state or performing a full reboot; and transmit a wake vector to the OS to continue operation. ### Claim 2 (depends on 1) The apparatus of claim 1, further including a baseboard management controller (BMC) to set a general purpose input/output (GPIO) as active when the firmware update is obtained, the ACPI to identify the firmware update based on a status of the GPIO. ### Claim 3 (depends on 1) The apparatus of claim 1, wherein the OS triggers an interrupt when preparing to enter into the sleep state, further including an interrupt handler to: in response to the interrupt, determine that the pseudo-sleep event was initiated; and trigger the BIOS to initiate the warm reset in response to the determination. ### Claim 4 (depends on 1) The apparatus of claim 1, wherein the wake vector causes the OS to return to operation. ### Claim 5 (depends on 1) The apparatus of claim 1, further including memory, the memory including a first section dedicated to the BIOS and a second section dedicated to the OS. ### Claim 6 (depends on 5) The apparatus of claim 5, wherein the BIOS is to update the firmware using the first section of the memory and keeping the second section of the memory intact. ### Claim 7 (depends on 1) The apparatus of claim 1, wherein the BIOS is to reset a second sleep state flag when at least one of (a) a pseudo-sleep flag is not set or (b) a memory topology has changed, the pseudo-sleep flag identifying that the pseudo-sleep event was initiated. ### Claim 8 (depends on 1) The apparatus of claim 1, wherein the firmware is implemented by at least one of BMC, the ACPI, the BIOS, a processor, a manageability engine, a solid state device, or a network-on-chip. ### Claim 9 A non-transitory computer readable storage medium comprising instructions which, when executed, cause a basic input/output system (BIOS) to at least: in response to (a) a pseudo-sleep event being initiated and (b) an operating system preparing for a sleep state, initiate a warm reset to update firmware according to a firmware update without entering the sleep state or performing a full reboot; and transmit a wake vector to the operating system after the firmware is updated. ### Claim 10 (depends on 9) The non-transitory computer readable storage medium of claim 9, wherein the instructions are to cause the BIOS to update the firmware using a first section of memory dedicated to the BIOS and keeping a second section of the memory intact, the second section of memory dedicated to the operating system. ### Claim 11 (depends on 9) The non-transitory computer readable storage medium of claim 9, wherein the instructions are to cause the BIOS to reset a second sleep state flag when at least one of (a) a pseudo-sleep flag is not set or (b) a memory topology has changed, the pseudo-sleep flag identifying that the pseudo-sleep event was initiated. ### Claim 12 (depends on 9) The non-transitory computer readable storage medium of claim 9, wherein the firmware is implemented by at least one of a baseboard management controller (BMC), an advanced configuration and power interface (ACPI), the BIOS, a processor, a manageability engine, a solid state device, or a network-on-chip. ### Claim 13 (depends on 9) The non-transitory computer readable storage medium of claim 9, wherein the instructions are to cause the BIOS to: determine that the pseudo-sleep event is initiated based on a flag; and determine that the operating system is preparing to enter the sleep state based on the operating system triggering an interrupt. ### Claim 14 An apparatus comprising: means for, in response to (a) a pseudo-sleep event being initiated and (b) an operating system preparing to enter a sleep state, initiating a warm reset to update firmware according to a firmware update without entering the sleep state or performing a full reboot; and means for waking up the operating system with a wake vector after the firmware is updated. ### Claim 15 (depends on 14) The apparatus of claim 14, further including means for storing data, the storing means including a first section dedicated to a basic input/output system (BIOS) and a second section dedicated to the operating system. ### Claim 16 (depends on 15) The apparatus of claim 15, wherein the waking means is to update the firmware using the first section of the storing means and keeping the second section of the storing means intact. ### Claim 17 (depends on 14) The apparatus of claim 14, wherein the waking means is to reset a second sleep state flag when at least one of (a) a pseudo-sleep flag is not set or (b) a memory topology has changed, the pseudo-sleep flag identifying that the pseudo-sleep event was initiated. ### Claim 18 (depends on 15) The apparatus of claim 15, wherein the firmware is implemented by at least one of a baseboard management controller (BMC), an advanced configuration and power interface (ACPI), a BIOS, a processor, a manageability engine, a solid state device, or a network-on-chip. ### Claim 19 (depends on 14) The apparatus of claim 14, wherein the initiating means is to: determine that the pseudo-sleep event is initiated based on a flag; and determine that the operating system is preparing to enter the sleep state based on the operating system triggering an interrupt. ### Claim 20 (depends on 14) The apparatus of claim 14, wherein the sleep state is an S3 sleep state.