# US 12,223,203 B2 · Memory system and control method

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- Number: US 12,223,203 B2
- Document ID: US12223203B2
- Status: Granted
- Kind: B2
- Application number: 18/459,979
- Filed: 2023-09-01
- Published: 2024-05-30
- Granted: 2025-02-11
- Earliest claimed: 2022-11-28
- Assignees: Kioxia Corporation
- Applicants: Kioxia Corporation
- Inventors: Akiyuki Kaneko
- Web page: https://patentgrep.com/patent/US12223203B2

## CPC

- G06F 3/0658: {Controller construction arrangements}
- G06F 3/061: {Improving I/O performance}
- G06F 3/0656: {Data buffering arrangements}
- G06F 3/0659: {Command handling arrangements, e.g. command buffers, queues, command scheduling}
- G06F 3/0604: {Improving or facilitating administration, e.g. storage management}
- G06F 3/0679: {Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]}
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

A memory controller of a memory system includes a host interface, a memory interface, and a write buffer configured to temporarily store data of a second size that is greater than a first size of a sector in each of a plurality of entries. Each of the entries includes a plurality of sectors. The memory controller is configured to select one of the entries in which write data is to be stored, determine whether the selected entry is missing data of any sector, perform a host inquiry by transmitting a request for the missing data, store the missing data in the selected entry, and then perform a write operation to store the data of the selected entry into the nonvolatile memory at a continuous physical address range of the nonvolatile memory.

## Claims

### Claim 1

A memory system comprising:
a nonvolatile memory; and
a memory controller including:
a host interface configured to communicate with a host in accordance with a first interface protocol, according to which write data is communicated in units of a sector having a first size;
a memory interface configured to communicate with the nonvolatile memory in accordance with a second interface protocol, write data is communicated in units of a second size greater than the first size; and
a write buffer configured to temporarily store data of a third size in each of a plurality of entries thereof, the third size being equal to the second size or 1/N of the second size, N being a natural number, each of the entries being reserved to store data of a plurality of sectors that are associated with a continuous logical address range, each of the plurality of sectors having the first size, wherein
the memory controller is configured to:
select one of the entries in which write data is to be stored;
determine whether the selected entry is missing data of any sector;
in response to determining that the selected entry is missing data of at least one sector, perform a host inquiry by transmitting a request to the host for the missing data via the host interface;
in response to receiving the missing data from the host via the host interface, store the missing data in the selected entry; and
when the selected entry is not missing data from any of the sectors, perform a write operation to store the data of the third size in the selected entry into the nonvolatile memory at a continuous physical address range thereof.

### Claim 2 (depends on 1)

The memory system according to claim 1, wherein the memory controller is further configured to maintain an address conversion table in which a correspondence between logical addresses and physical addresses is stored in units of the third size.

### Claim 3 (depends on 2)

The memory system according to claim 2, wherein the memory controller is further configured to update the address conversion table such that a continuous logical address range corresponding to the write data stored in the nonvolatile memory is associated with the continuous physical address range of the nonvolatile memory.

### Claim 4 (depends on 1)

The memory system according to claim 1, wherein the memory controller is further configured to:
determine a first parameter value representing a ratio of vacant entries in the write buffer that store no data with respect to the total size of the write buffer; and
select one of the entries in which write data is to be stored when the first parameter value drops to a first threshold.

### Claim 5 (depends on 1)

The memory system according to claim 1, wherein the memory controller is further configured to perform a read operation to read data associated with a same logical address range as the missing data from the nonvolatile memory and store the read data in the selected entry.

### Claim 6 (depends on 5)

The memory system according to claim 5, wherein the memory controller is further configured to:
determine a second parameter value representing a ratio of a size of missing data in the selected entry divided by the third size; and
perform one of the host inquiry and the read operation based on comparison of the second parameter value with a second threshold.

### Claim 7 (depends on 6)

The memory system according to claim 6, wherein the memory controller is further configured to:
perform the host inquiry when the second parameter value is less than the second threshold; and
perform the read operation, when the second parameter value is greater than the second threshold.

### Claim 8 (depends on 5)

The memory system according to claim 5, wherein the memory controller is further configured to:
determine a third parameter value representing a use ratio of communication by the host interface; and
perform one of the host inquiry and the read operation based on comparison of the third parameter value with a third threshold.

### Claim 9 (depends on 8)

The memory system according to claim 8, wherein the memory controller is further configured to:
perform the host inquiry when the third parameter value is less than the third threshold; and
perform the read operation, when the third parameter value is greater than the third threshold.

### Claim 10 (depends on 8)

The memory system according to claim 8, wherein the memory controller is further configured to:
determine a fourth parameter value representing a ratio of vacant entries in the write buffer that store no data with respect to the total size of the write buffer; and
perform one of the host inquiry and the read operation also based on comparison of the fourth parameter value with a fourth threshold.

### Claim 11 (depends on 10)

The memory system according to claim 10, wherein the memory controller is further configured to:
perform the host inquiry when the third parameter value is less than the third threshold; and
perform the read operation, when the third parameter value is greater than the third threshold and the fourth parameter value is less than the fourth threshold.

### Claim 12 (depends on 5)

The memory system according to claim 5, wherein the memory controller is further configured to:
determine a fifth parameter value representing a number of requests from the host that have not been processed by the memory controller; and
perform one of the host inquiry and the read operation based on comparison of the fifth parameter value with a fifth threshold.

### Claim 13 (depends on 12)

The memory system according to claim 12, wherein the memory controller is further configured to:
determine a sixth parameter value representing a number of requests from the host that are being processed by the memory controller; and
perform one of the host inquiry and the read operation also based on comparison of the sixth parameter value with a sixth threshold.

### Claim 14 (depends on 13)

The memory system according to claim 13, wherein the memory controller is further configured to:
perform the host inquiry when the fifth parameter value is less than the fifth threshold and the sixth parameter value is less than the sixth threshold; and
perform the read operation, when the fifth parameter value is greater than the fifth threshold and when the sixth parameter value is greater than the sixth threshold.

### Claim 15 (depends on 5)

The memory system according to claim 5, wherein the memory controller is further configured to:
maintain a read history table indicating a logical address corresponding to data that have been read from the nonvolatile memory;
determine whether a logical address corresponding to the missing data is included in the read history table; and
perform one of the host inquiry and the read operation based on whether the logical address corresponding to the missing data is included in the read history table.

### Claim 16 (depends on 15)

The memory system according to claim 15, wherein the memory controller is further configured to:
perform the host inquiry when the logical address corresponding to the missing data is included in the read history table; and
perform the read operation, when the logical address corresponding to the missing data is not included in the read history table.

### Claim 17 (depends on 1)

An information processing system comprising:
the memory system according to claim 1; and
the host, which includes a cache memory configured to store data in each of a plurality of cache lines, each of which has the first size, wherein
the host is configured to, in response to receiving the request for the missing data, search the cache memory for the missing data and transmit the missing data to the memory system when the missing data is stored in one or more of the cache lines of the cache memory.

### Claim 18

A method for controlling a memory system comprising:
a nonvolatile memory; and
a memory controller including:
a host interface configured to communicate with a host in accordance with a first interface protocol, according to which write data is communicated in units of a sector having a first size;
a memory interface configured to communicate with the nonvolatile memory in accordance with a second interface protocol, write data is communicated in units of a second size greater than the first size; and
a write buffer configured to temporarily store data of a third size in each of a plurality of entries thereof, each of the entries being reserved to store data of a plurality of sectors that are associated with a continuous logical address range, the third size being equal to the second size or 1/N of the second size, N being a natural number, each of the plurality of sectors having the first size, the method comprising:
selecting one of the entries in which write data is to be stored;
determining whether the selected entry is missing data of any sector;
in response to determining that the selected entry is missing data of at least one sector, performing a host inquiry by transmitting a request to the host for the missing data via the host interface;
in response to receiving the missing data from the host via the host interface, storing the missing data in the selected entry; and
when the selected entry is not missing data from any of the sectors, performing a write operation to store the data of the second size in the selected entry into the nonvolatile memory at a continuous physical address range thereof.

### Claim 19 (depends on 18)

The method according to claim 18, further comprising:
maintaining an address conversion table in which a correspondence between logical addresses and physical addresses is stored in unit of the third size of data.

### Claim 20 (depends on 19)

The method according to claim 19, further comprising:
updating the address conversion table such that a continuous logical address range corresponding to the write data stored in the nonvolatile memory is associated with the continuous physical address range of the nonvolatile memory.