# US 12,222,887 B2 · Bandwidth allocation method and apparatus for PCIe external plug-in card, and device and storage medium

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- Number: US 12,222,887 B2
- Document ID: US12222887B2
- Status: Granted
- Kind: B2
- Application number: 18/026,339
- Filed: 2021-10-29
- Published: 2023-11-02
- Granted: 2025-02-11
- Earliest claimed: 2020-12-26
- Assignees: Inspur Suzhou Intelligent Technology Co., Ltd.
- Applicants: Inspur Suzhou Intelligent Technology Co., Ltd.
- Inventors: Tonghui Xu
- Web page: https://patentgrep.com/patent/US12222887B2

## CPC

- G06F 13/4072: {Drivers or receivers (G06F13/4086 takes precedence; for multistate logic circuits H03K19/0002)}
- G06F 13/4022: {using switching circuits, e.g. switching matrix, connection or expansion network (G06F13/4009 takes precedence)}
- G06F 13/423: {with synchronous protocol}
- G06F 13/4282: {on a serial bus, e.g. I2C bus, SPI bus (on daisy chain buses G06F13/4247)}
- G06F 13/4291: {using a clocked protocol}
- G06F 2213/0026: PCI express
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

Disclosed is bandwidth allocation method for a PCIe external plug-in card. The method comprises: configuring a south bridge chip to successively connect to a connector, an adapter card and a PCIe external plug-in card by means of an I2C bus, wherein the PCIe external plug-in card stores preset configuration information; in response to a system being powered on, the south bridge chip acquiring, by means of the I2C bus, the preset configuration information stored in the PCIe external plug-in card; and the south bridge chip determining a target bandwidth according to the preset configuration information, and allocating a bandwidth to the PCIe external plug-in card on the basis of the target bandwidth.

## Claims

### Claim 1

A method for allocating a bandwidth for a Peripheral Component Interconnect Express (PCIe) external plug-in card, comprising:
configuring a Platform Controller Hub (PCH) of a system to connect with a connector, an adapter card and a PCIe external plug-in card successively through an Inter-Integrated Circuit (I2C) bus;
in response to that the system is powered on, enabling the PCH to obtain a preset configuration information stored in the PCIe external plug-in card through the I2C bus; and
enabling the PCH to determine a target bandwidth according to the preset configuration information, and allocate a bandwidth for the PCIe external plug-in card based on the target bandwidth,
wherein the configuring the PCH to connect with the connector, the adapter card and the PCIe external plug-in card successively through the I2C bus, comprises:
configuring the PCH to connect with a baseboard management controller through the I2C bus; and
configuring the baseboard management controller to connect with the connector, the adapter card and the PCIe external plug-in card successively through the I2C bus, and
wherein the enabling the PCH to obtain the preset configuration information stored in the PCIe external plug-in card through the I2C bus, comprises:
in response to that the system is powered on, sending, by the baseboard management controller, a first read request to the PCIe external plug-in card through the I2C bus;
in response to the first read request, returning, by the PCIe external plug-in card, the preset configuration information to the baseboard management controller through the I2C bus; and
receiving the preset configuration information and sending the preset configuration information to the PCH, by the baseboard management controller.

### Claim 2 (depends on 1)

The method according to claim 1, wherein the enabling the PCH to determine the target bandwidth according to the preset configuration information, comprises:
parsing the preset configuration information to obtain a first preset field representing the bandwidth; or
parsing the preset configuration information to obtain a second preset field representing a type of the PCIe external plug-in card, and matching the second preset field with a corresponding relationship between preset fields and bandwidths, to obtain the target bandwidth.

### Claim 3 (depends on 2)

The method according to claim 2, wherein the target bandwidth is any one of X16, X8+X8, or X4+X4+X4+X4.

### Claim 4 (depends on 1)

The method according to claim 1, wherein in response to that the system is powered on, the enabling the PCH to obtain the preset configuration information stored in the PCIe external plug-in card through the I2C bus, comprises:
in response to that a PowerButton of the system is pressed down, enabling the PCH to obtain the preset configuration information.

### Claim 5 (depends on 1)

The method according to claim 1, wherein the preset configuration information is stored in an Electrically Erasable Programmable Read-Only Memory (EEPROM) of the PCIe external plug-in card.

### Claim 6 (depends on 1)

The method according to claim 1, wherein the preset configuration information comprises any one of a type, a unique identification PN number, and an asset information, of the PCIe external plug-in card.

### Claim 7

A method for allocating a bandwidth for a Peripheral Component Interconnect Express (PCIe) external plug-in card, comprising:
configuring a Platform Controller Hub (PCH) of a system to connect with a connector, an adapter card and a PCIe external plug-in card successively through an Inter-Integrated Circuit (I2C) bus;
in response to that the system is powered on, enabling the PCH to obtain a preset configuration information stored in the PCIe external plug-in card through the I2C bus; and
enabling the PCH to determine a target bandwidth according to the preset configuration information, and allocate a bandwidth for the PCIe external plug-in card based on the target bandwidth,
wherein the configuring the PCH to connect with the connector, the adapter card and the PCIe external plug-in card successively through the I2C bus, comprises:
configuring two input ends of an arbitration chip to respectively connect with the PCH and the baseboard management controller through the I2C bus;
configuring an output end of the arbitration chip to connect with the connector, the adapter card and the PCIe external plug-in card successively through the I2C bus;
in response to that the system is powered on, selecting, by the arbitration chip, the PCH as inputting after strobing of the arbitration chip is powered on; and
in response to that the PCH completes allocating the bandwidth, selecting, by the arbitration chip, the baseboard management controller as the inputting, and
wherein the enabling the PCH to obtain the preset configuration information stored in the PCIe external plug-in card through the I2C bus, comprises:
in response to that the arbitration chip selects the PCH as the inputting after the strobing of the arbitration chip is powered on, sending, by the PCH, a second read request to the PCIe external plug-in card through the I2C bus; and
in response to the second read request, returning, by the PCIe external plug-in card, the preset configuration information to the PCH through the I2C bus.

### Claim 8 (depends on 7)

The method according to claim 7, wherein in response to that the system is powered on, the selecting, by the arbitration chip, the PCH as inputting after strobing of the arbitration chip is powered on, comprises:
in response to that a PowerButton of the system is pressed down, selecting, by the arbitration chip, the PCH as inputting after strobing of the arbitration chip is powered on.

### Claim 9 (depends on 7)

The method according to claim 7, wherein in response to that the system is powered on, the selecting, by the arbitration chip, the PCH as inputting after strobing of the arbitration chip is powered on, is performed in a phase during a startup process of a unified extendable firmware system.

### Claim 10 (depends on 8)

The method according to claim 8, wherein in response to that the system is powered on, the enabling the PCH to obtain the preset configuration information stored in the PCIe external plug-in card through the I2C bus, comprises:
in response to that the PowerButton of the system is pressed down, enabling the PCH to obtain the preset configuration information through the arbitration chip.

### Claim 11 (depends on 9)

The method according to claim 9, wherein in response to that the system is powered on, the enabling the PCH to obtain the preset configuration information stored in the PCIe external plug-in card through the I2C bus, comprises:
in the phase during a startup process of a unified extendable firmware system, enabling the PCH to obtain the preset configuration information through the arbitration chip.

### Claim 12 (depends on 7)

The method according to claim 7, wherein the enabling the PCH to determine the target bandwidth according to the preset configuration information, comprises:
parsing the preset configuration information to obtain a first preset field representing the bandwidth; or
parsing the preset configuration information to obtain a second preset field representing a type of the PCIe external plug-in card, and matching the second preset field with a corresponding relationship between preset fields and bandwidths, to obtain the target bandwidth.

### Claim 13 (depends on 12)

The method according to claim 12, wherein the target bandwidth is any one of X16, X8+X8, or X4+X4+X4+X4.

### Claim 14 (depends on 7)

The method according to claim 7, wherein the preset configuration information is stored in an Electrically Erasable Programmable Read-Only Memory (EEPROM) of the PCIe external plug-in card.

### Claim 15 (depends on 7)

The method according to claim 7, wherein the preset configuration information comprises any one of a type, a unique identification PN number, and an asset information, of the PCIe external plug-in card.

### Claim 16

A computer device for allocating a bandwidth for a PCIe external plug-in card, comprising: a memory and one or more processors, wherein the memory stores computer-readable instructions, and in response to that the computer-readable instructions are executed by the one or more processors, the computer-readable instructions make the one or more processors to
configure a PCH of a system to connect with a connector, an adapter card and a PCIe external plug-in card successively through an I2C bus;
in response to that the system is powered on, enable the PCH to obtain preset configuration information stored in the PCIe external plug-in card through the I2C bus; and
enable the PCH to determine a target bandwidth according to the preset configuration information, and allocate a bandwidth for the PCIe external plug-in card based on the target bandwidth,
wherein the configuring the PCH to connect with the connector, the adapter card and the PCIe external plug-in card successively through the I2C bus, comprises:
configuring the PCH to connect with a baseboard management controller through the I2C bus; and
configuring the baseboard management controller to connect with the connector, the adapter card and the PCIe external plug-in card successively through the I2C bus, and
wherein the enabling the PCH to obtain the preset configuration information stored in the PCIe external plug-in card through the I2C bus, comprises:
in response to that the system is powered on, sending, by the baseboard management controller, a first read request to the PCIe external plug-in card through the I2C bus;
in response to the first read request, returning, by the PCIe external plug-in card, the preset configuration information to the baseboard management controller through the I2C bus; and
receiving the preset configuration information and sending the preset configuration information to the PCH, by the baseboard management controller.

### Claim 17 (depends on 16)

The computer device according to claim 16, wherein the enabling the PCH to determine the target bandwidth according to the preset configuration information, comprises:
parsing the preset configuration information to obtain a first preset field representing the bandwidth; or
parsing the preset configuration information to obtain a second preset field representing a type of the PCIe external plug-in card, and matching the second preset field with a corresponding relationship between preset fields and bandwidths, to obtain the target bandwidth.

### Claim 18 (depends on 17)

The computer device according to claim 17, wherein the target bandwidth is any one of X16, X8+X8, or X4+X4+X4+X4.

### Claim 19 (depends on 16)

The computer device according to claim 16, wherein in response to that the system is powered on, the enabling the PCH to obtain the preset configuration information stored in the PCIe external plug-in card through the I2C bus, comprises:
in response to that a PowerButton of the system is pressed down, enabling the PCH to obtain the preset configuration information.

### Claim 20 (depends on 16)

The computer device according to claim 16, wherein the preset configuration information is stored in an Electrically Erasable Programmable Read-Only Memory (EEPROM) of the PCIe external plug-in card.
