# US 12,222,830 B2 · Fault isolation and recovery of CPU cores for failed secondary asymmetric multiprocessing instance > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,222,830 B2 - Document ID: US12222830B2 - Status: Granted - Kind: B2 - Application number: 18/539,996 - Filed: 2023-12-14 - Published: 2024-05-16 - Granted: 2025-02-11 - Earliest claimed: 2019-12-10 - Assignees: Cisco Technology, Inc. - Applicants: Cisco Technology, Inc. - Inventors: Amit Chandra; Nivin Lawrence; Etienne Martineau - Web page: https://patentgrep.com/patent/US12222830B2 ## CPC - G06F 11/1417: {Boot up procedures} - G06F 11/2242: {in multi-processor systems, e.g. one processor becoming the primary tester (G06F11/2736 takes precedence)} - G06F 9/30101: {Special purpose registers} - G06F 9/3861: {Recovery, e.g. branch miss-prediction, exception handling (error detection or correction G06F11/00)} - G06F 9/4401: Bootstrapping (security arrangements therefor G06F21/57) - G06F 9/4405: {Initialisation of multiprocessor systems} - G06F 9/4812: {by interrupt, e.g. masked} - G06F 11/0793: {Remedial or corrective actions (recovery from an exception in an instruction pipeline G06F9/3861; by retry G06F11/1402; for recovering from a failure of a protocol instance or entity H04L69/40)} - G06F 11/1433: {during software upgrading} - G06F 11/0757: {by exceeding a time limit, i.e. time-out, e.g. watchdogs} - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract According to certain embodiments, a system includes one or more processors and one or more computer-readable non-transitory storage media comprising instructions that, when executed by the one or more processors, cause one or more components to perform operations including executing a software process of a secondary instance, the secondary instance running in parallel with a primary instance and associated with a plurality of cores including a bootstrap core, registering a non-maskable interrupt for the bootstrap core in the secondary instance, determining whether the secondary instance is in a fault state, wherein, if the secondary instance is in the fault state, halting the plurality of cores associated with the secondary instance, without impact to the primary instance, and recovering the bootstrap core by switching a context of the bootstrap core from the secondary instance to the primary instance via the non-maskable interrupt. ## Claims ### Claim 1 A system, comprising: one or more processors; and one or more computer-readable non-transitory storage media comprising instructions that, when executed by the one or more processors, cause one or more components of the system to perform operations comprising: issuing, by a primary instance, a central processing unit (CPU) hotplug from a user space; delivering, by the CPU hotplug, a non-maskable interrupt (NMI) to a bootstrap core; initiating, by the NMI, a recovery sequence to switch a context of the bootstrap core from a secondary instance to the primary instance; executing the bootstrap core into an online state in the primary instance; and recovering, by the primary instance, a plurality of CPU cores from the secondary instance. ### Claim 2 (depends on 1) The system of claim 1, wherein initiating, by the NMI, a recovery sequence to switch a context of the bootstrap core from a secondary instance to the primary instance comprises: writing a trampoline page directory table address to a control register of the secondary instance; and branching execution of the bootstrap core to a real mode machine start address of the primary instance. ### Claim 3 (depends on 2) The system of claim 2, wherein branching the execution of the bootstrap core to the real mode machine start address of the primary instance is performed by leveraging an advanced power management (APM) restart hook. ### Claim 4 (depends on 1) The system of claim 1, the operations further comprising issuing, by the primary instance, the CPU hotplug from the user space in response to detecting, by the primary instance, that the secondary instance is in a fault or panic state. ### Claim 5 (depends on 4) The system of claim 4, the operations further comprising presuming that the plurality of CPU cores of the secondary instance have been halted in response to detecting, by the primary instance, that the secondary instance is in the fault or panic state. ### Claim 6 (depends on 1) The system of claim 1, the operations further comprising recovering, by the primary instance, the plurality of CPU cores from the secondary instance using an Inter-processor Interrupt (IPI) start-up from the primary instance. ### Claim 7 (depends on 1) The system of claim 1, wherein the secondary instance and the primary instance are communicatively coupled to a memory location shared between the primary instance and the secondary instance. ### Claim 8 A method, comprising: issuing, by a primary instance, a central processing unit (CPU) hotplug from a user space; delivering, by the CPU hotplug, a non-maskable interrupt (NMI) to a bootstrap core; initiating, by the NMI, a recovery sequence to switch a context of the bootstrap core from a secondary instance to the primary instance; executing the bootstrap core into an online state in the primary instance; and recovering, by the primary instance, a plurality of CPU cores from the secondary instance. ### Claim 9 (depends on 8) The method of claim 8, wherein initiating, by the NMI, a recovery sequence to switch a context of the bootstrap core from a secondary instance to the primary instance comprises: writing a trampoline page directory table address to a control register of the secondary instance; and branching execution of the bootstrap core to a real mode machine start address of the primary instance. ### Claim 10 (depends on 9) The method of claim 9, wherein branching the execution of the bootstrap core to the real mode machine start address of the primary instance is performed by leveraging an advanced power management (APM) restart hook. ### Claim 11 (depends on 8) The method of claim 8, further comprising issuing, by the primary instance, the CPU hotplug from the user space in response to detecting, by the primary instance, that the secondary instance is in a fault or panic state. ### Claim 12 (depends on 11) The method of claim 11, further comprising presuming that the plurality of CPU cores of the secondary instance have been halted in response to detecting, by the primary instance, that the secondary instance is in the fault or panic state. ### Claim 13 (depends on 8) The method of claim 8, further comprising recovering, by the primary instance, the plurality of CPU cores from the secondary instance using an Inter-processor Interrupt (IPI) start-up from the primary instance. ### Claim 14 (depends on 8) The method of claim 8, wherein the secondary instance and the primary instance are communicatively coupled to a memory location shared between the primary instance and the secondary instance. ### Claim 15 One or more computer-readable non-transitory storage media embodying instructions that, when executed by a processor, cause performance of operations comprising, comprising: issuing, by a primary instance, a central processing unit (CPU) hotplug from a user space; delivering, by the CPU hotplug, a non-maskable interrupt (NMI) to a bootstrap core; initiating, by the NMI, a recovery sequence to switch a context of the bootstrap core from a secondary instance to the primary instance; executing the bootstrap core into an online state in the primary instance; and recovering, by the primary instance, a plurality of CPU cores from the secondary instance. ### Claim 16 (depends on 15) The one or more computer-readable non-transitory storage media of claim 15, wherein initiating, by the NMI, a recovery sequence to switch a context of the bootstrap core from a secondary instance to the primary instance comprises: writing a trampoline page directory table address to a control register of the secondary instance; and branching execution of the bootstrap core to a real mode machine start address of the primary instance. ### Claim 17 (depends on 16) The one or more computer-readable non-transitory storage media of claim 16, wherein branching the execution of the bootstrap core to the real mode machine start address of the primary instance is performed by leveraging an advanced power management (APM) restart hook. ### Claim 18 (depends on 15) The one or more computer-readable non-transitory storage media of claim 15, the operations further comprising issuing, by the primary instance, the CPU hotplug from the user space in response to detecting, by the primary instance, that the secondary instance is in a fault or panic state. ### Claim 19 (depends on 18) The one or more computer-readable non-transitory storage media of claim 18, the operations further comprising presuming that the plurality of CPU cores of the secondary instance have been halted in response to detecting, by the primary instance, that the secondary instance is in the fault or panic state. ### Claim 20 (depends on 15) The one or more computer-readable non-transitory storage media of claim 15, the operations further comprising recovering, by the primary instance, the plurality of CPU cores from the secondary instance using an Inter-processor Interrupt (IPI) start-up from the primary instance.