# US 12,222,790 B2 · Power management for Universal Serial Bus (USB) type-C port > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,222,790 B2 - Document ID: US12222790B2 - Status: Granted - Kind: B2 - Application number: 17/131,533 - Filed: 2020-12-22 - Published: 2022-06-23 - Granted: 2025-02-11 - Earliest claimed: 2020-12-22 - Assignees: Intel Corporation - Applicants: Intel Corporation - Inventors: Venkataramani Gopalakrishnan; Ravishankar S.; Yaniv Hayat; Yi Jen Huang - Web page: https://patentgrep.com/patent/US12222790B2 ## CPC - G06F 1/3253: {Power saving in bus} - G06F 1/266: {Arrangements to supply power to external peripherals either directly from the computer or under computer control, e.g. supply of power through the communication port, computer controlled power-strips} - G06F 9/4418: {Suspend and resume; Hibernate and awake} - G06F 13/4282: {on a serial bus, e.g. I2C bus, SPI bus (on daisy chain buses G06F13/4247)} - G06F 2213/0042: Universal serial bus [USB] - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract A power management scheme for USB systems. For Mobile systems that has re-timer, a handshake is used between power delivery (PD) controller, re-timer and embedded controller (EC) so that the PD controller can end higher wattage power contract on USB-C connector after TBT/USB4 link is in low power (CLd/U3) and during system low power transition allowing Dynamic Platform and Thermal Framework (DPTF) framework to boost CPU performance and enhance battery capacity respectively. The same solution can be extended to desktop segment to allow PD controller to lower the USB-C power contract with connected devices before switching to standby rail. For mobile systems that are without re-timer, a handshake is used between BIOS, PD controller and EC so that PD controller can end higher wattage power contract on USB-C connector after TBT/USB4 link is in low power (CLd/U3) and during system low power transition. ## Claims ### Claim 1 An apparatus comprising: a power delivery controller; and a re-timer coupled to the power delivery controller, wherein the power delivery controller is coupled to a device connector which is configured to be coupled to power source device or a power sink device, wherein the re-timer generates an interrupt to the power delivery controller when a link between the device connector and the power source device or the power sink device is in low power state with disabled wake, wherein in response to the interrupt, the power delivery controller is to scale down a power contract with the power sink device to allow the power sink device to draw a suspend current. ### Claim 2 (depends on 1) The apparatus of claim 1, wherein the re-timer holds off propagating any host-initiated or device-initiated wake until the interrupt is cleared. ### Claim 3 (depends on 1) The apparatus of claim 1, wherein the power delivery controller reads a status register bit to confirm that the link has entered the low power state. ### Claim 4 (depends on 1) The apparatus of claim 1, wherein the power delivery controller is to send a notification of the power contract to an embedded controller. ### Claim 5 (depends on 4) The apparatus of claim 4, wherein the embedded controller is to aggregate all power from one or more connectors including the device connector and updates a PL4 offset to a processor. ### Claim 6 (depends on 5) The apparatus of claim 5, wherein the embedded controller clears an Alert interrupt and notifies the power delivery controller of change to the PL4 offset. ### Claim 7 (depends on 6) The apparatus of claim 6, wherein the power delivery controller updates a re-timer connection state register bit in the re-timer, and as such, the re-timer acknowledges reduction in the power contract with the device. ### Claim 8 (depends on 7) The apparatus of claim 7, wherein the re-timer reads the re-timer connection state register and clears the interrupt to the power delivery controller. ### Claim 9 (depends on 8) The apparatus of claim 8, wherein the power delivery controller clears the re-timer connection state register bit. ### Claim 10 (depends on 9) The apparatus of claim 9, wherein the re-timer removes any holds off on propagating any host-initiated or device-initiated wake. ### Claim 11 (depends on 1) The apparatus of claim 1, wherein the low power state is one of U3 or CLd state. ### Claim 12 (depends on 1) The apparatus of claim 1, wherein the power source device or the power sink device is one of a Universal Serial Bus (USB) device or Thunderbolt device, and wherein the link is one of the USB link or a thunderbolt link. ### Claim 13 An apparatus comprising: a power delivery controller; and a re-timer coupled to the power delivery controller, wherein the power delivery controller is coupled to a device connector which is configured to be part of an interconnect link coupled to a power source device or a power sink device, wherein the power delivery controller scales down a power contract with the device in response to issuance of an interrupt by the re-timer to the power delivery controller in response to the link being in a disabled or unavailable wake state. ### Claim 14 (depends on 13) The apparatus of claim 13, wherein the re-timer generates the interrupt to the power delivery controller when a link between the device connector and the power source device or the power sink device is in low power state with disabled wake. ### Claim 15 (depends on 13) The apparatus of claim 13, wherein the re-timer holds off propagating any host-initiated or device-initiated wake until the interrupt is cleared. ### Claim 16 A system comprising: a memory; a processor coupled to the memory; an embedded controller coupled to the processor; and a power delivery controller unit coupled to the processor and the embedded controller, wherein the power delivery controller unit comprising: a power delivery controller; and a re-timer coupled to the power delivery controller, wherein the power delivery controller is coupled to a device connector which is configured to be coupled to a power source device or a power sink device, wherein the re-timer generates an interrupt to the power delivery controller when a link between the device connector and the power source device or the power sink device is in low power state with disabled wake to reduce an allowed upper current limit for the device in the low power state. ### Claim 17 (depends on 16) The system of claim 16, wherein the re-timer holds off propagating any host-initiated or device-initiated wake until the interrupt is cleared. ### Claim 18 (depends on 16) The system of claim 16, wherein the power delivery controller reads a status register bit to confirm that the link has entered the low power state. ### Claim 19 (depends on 16) The system of claim 16, wherein the power delivery controller is to scale down a power contract with the power sink device to allow the power sink device to draw a suspend current.