# US 12,218,276 B2 · Semiconductor structures and substrates thereof, and methods for manufacturing the same > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,218,276 B2 - Document ID: US12218276B2 - Status: Granted - Kind: B2 - Application number: 17/613,479 - Filed: 2020-01-09 - Published: 2022-07-14 - Granted: 2025-02-04 - Earliest claimed: 2020-01-09 - Assignees: Enkris Semiconductor, Inc. - Applicants: Enkris Semiconductor, Inc. - Inventors: Kai Cheng - Web page: https://patentgrep.com/patent/US12218276B2 ## CPC - H10H 20/819: characterised by their shape, e.g. curved or truncated substrates - H10H 20/821: of the light-emitting regions, e.g. non-planar junctions - H10H 20/01: Manufacture or treatment - H10H 20/812: within the light-emitting regions, e.g. having quantum confinement structures - H10H 20/813: having a plurality of light-emitting regions, e.g. multi-junction LEDs or light-emitting devices having photoluminescent regions within the bodies - H10H 29/10: Integrated devices comprising at least one light-emitting semiconductor component covered by group H10H20/00 (active-matrix LED displays H10H29/30) - H10H 20/013: {having light-emitting regions comprising only Group III-V materials} - H10H 20/0133: {with a substrate not being Group III-V materials} - H10H 20/817: characterised by the crystal structures or orientations, e.g. polycrystalline, amorphous or porous - H10H 29/142: {Two-dimensional arrangements, e.g. asymmetric LED layout} - H10H: INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS ## Abstract The present disclosure provides a semiconductor structure and substrate thereof, and a method for manufacturing the same. In the method for manufacturing the substrate, at least one of groove is provided in each unit sub-region on a surface of a premanufactured substrate, and the premanufactured substrate includes at least one unit region, each of the at least one unit region includes at least two unit sub-regions; in one of the at least one unit region, the at least two unit sub-regions respectively have different porosities, the premanufactured substrate is annealed to form a substrate, wherein openings of the grooves are healed to form self-healing layers, and the grooves that are not fully healed form gaps. When a susceptor transfers heat to the substrate, the unit sub-regions with different porosities respectively have different heat conduction efficiencies. ## Claims ### Claim 1 A substrate, comprising: at least one unit region, wherein each of the at least one unit region comprises at least two unit sub-regions, each of the at least two unit sub-regions has at least one gap and at least one self-healing layer for closing the at least one gap; and in one of the at least one unit region, the at least two unit sub-regions respectively have different porosities. ### Claim 2 (depends on 1) The substrate according to claim 1, wherein in the one of the at least one unit region, one or more of: (a) the at least one gap in each of the at least two unit sub-regions respectively has different depths and/or different widths, or (b) the at least two unit sub-regions respectively have different pore densities. ### Claim 3 (depends on 1) The substrate according to claim 1, wherein the at least one self-healing layer is coupled to a front surface or a back surface of the substrate. ### Claim 4 (depends on 1) The substrate according to claim 1, wherein the at least one self-healing layer is coupled to a front surface and a back surface of the substrate. ### Claim 5 (depends on 1) The substrate according to claim 1, wherein in the one of the at least one unit region, the self-healing layers of some of the at least two unit sub-regions are coupled to a front surface or a back surface of the substrate; and the self-healing layers of some of the at least two unit sub-regions are coupled to the front surface and the back surface of the substrate. ### Claim 6 (depends on 1) The substrate according to claim 1, wherein the substrate is a patterned substrate. ### Claim 7 (depends on 1) The substrate according to claim 1, wherein a material of the substrate is at least one of sapphire, silicon, silicon carbide, or a GaN-based material. ### Claim 8 (depends on 1) A semiconductor structure, comprising: the substrate according to claim 1; and a light-emitting layer disposed on a front surface of the substrate, wherein in the one of the at least one unit region, a light-emitting wavelength of the light-emitting layer for each of the at least two unit sub-regions differs. ### Claim 9 (depends on 8) The semiconductor structure according to claim 8, wherein the light-emitting layer comprises: an N-type semiconductor layer, a P-type semiconductor layer, and a multi-quantum well material layer disposed between the N-type semiconductor layer and the P-type semiconductor layer. ### Claim 10 (depends on 8) The semiconductor structure according to claim 8, wherein the light-emitting layer comprises multiple N-type semiconductor layers and multiple P-type semiconductor layers, wherein the multiple N-type semiconductor layers and the multiple P-type semiconductor layers are disposed alternately, and multi-quantum well material layers are respectively disposed between each of the N-type semiconductor layers and the P-type semiconductor layer adjacent to the N-type semiconductor layer. ### Claim 11 (depends on 8) The semiconductor structure according to claim 8, wherein the semiconductor structure is used for display; and the light-emitting layer of each of the at least one unit region forms a light-emitting unit. ### Claim 12 A method for manufacturing a substrate, comprising: providing a premanufactured substrate, wherein the premanufactured substrate comprises at least one unit region, and each of the at least one unit region comprises at least two unit sub-regions; providing at least one groove in each of the at least two unit sub-regions on a surface of the premanufactured substrate, wherein in one of the at least one unit region, the at least two unit sub-regions respectively have different porosities; and annealing the premanufactured substrate to form a substrate, wherein openings of the grooves are healed to form self-healing layers, and the grooves that are not fully healed form gaps. ### Claim 13 (depends on 12) The method for manufacturing a substrate according to claim 12, wherein in the one of the at least one unit region, one or more of: (a) the at least one groove in each of the at least two unit sub-regions respectively has different depths and/or different widths, or (b) the at least two unit sub-regions respectively have different pore densities. ### Claim 14 (depends on 12) The method for manufacturing a substrate according to claim 12, wherein the at least one groove is provided in each of the unit sub-regions on a front surface or a back surface of the premanufactured substrate. ### Claim 15 (depends on 12) The method for manufacturing a substrate according to claim 12, wherein the at least one groove is provided in each of the unit sub-regions on a front surface and a back surface of the premanufactured substrate. ### Claim 16 (depends on 12) The method for manufacturing a substrate according to claim 12, wherein a width of each of the at least one groove is less than 100 μm. ### Claim 17 (depends on 12) A method for manufacturing a semiconductor structure, comprising: manufacturing a substrate by the method according to claim 12; and growing a light-emitting layer on a front surface of the substrate, wherein in one of the at least one unit region, a light-emitting wavelength of the light-emitting layer for each of the at least two unit sub-regions differs. ### Claim 18 (depends on 16) The method for manufacturing a semiconductor structure according to claim 16, wherein the light-emitting layer comprises: an N-type semiconductor layer, a P-type semiconductor layer, and a multi-quantum well material layer disposed between the N-type semiconductor layer and the P-type semiconductor layer. ### Claim 19 (depends on 16) The method for manufacturing a semiconductor structure according to claim 16, wherein the light-emitting layer comprises multiple N-type semiconductor layers and multiple P-type semiconductor layers, wherein the multiple N-type semiconductor layers and the multiple P-type semiconductor layers are disposed alternately, and multi-quantum well material layers are respectively disposed between each of the N-type semiconductor layers and the P-type semiconductor layer adjacent to the N-type semiconductor layer. ### Claim 20 (depends on 17) The method for manufacturing a semiconductor structure according to claim 17, wherein a forbidden bandwidth of the multi-quantum well material layer increases along with the rise of a growth temperature; wherein in the one of the at least one unit region, the greater the porosity of the unit sub-region is, the longer the light-emitting wavelength of the corresponding light-emitting layer is; and the smaller the porosity of the unit sub-region is, the shorter the light-emitting wavelength of the corresponding light-emitting layer is.