# US 12,218,252 B2 · Semiconductor structure with source and drain electrode embedded within semiconductor layer and manufacturing method thereof

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- Number: US 12,218,252 B2
- Document ID: US12218252B2
- Status: Granted
- Kind: B2
- Application number: 17/460,969
- Filed: 2021-08-30
- Published: 2023-03-02
- Granted: 2025-02-04
- Earliest claimed: 2021-08-30
- Assignees: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicants: Taiwan Semiconductor Manufacturing Company Ltd.
- Inventors: Chia-Jung Yu; Pin-Cheng Hsu
- Web page: https://patentgrep.com/patent/US12218252B2

## CPC

- H10D 30/6757: {characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile (TFTs having channel structures for preventing kink or snapback effects H10D30/6708; TFTs having lightly-doped source or drain extensions H10D30/6715)}
- H10B 61/22: {of the field-effect transistor [FET] type}
- H10D 30/6729: {characterised by the electrodes}
- H10D 99/00: Subject matter not provided for in other groups of this subclass
- H10D 30/6755: {Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate}
- H10D 86/423: {comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO}
- H10D 86/60: wherein the TFTs are in active matrices
- H10N 50/01: Manufacture or treatment
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10B: ELECTRONIC MEMORY DEVICES
- H10N: ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR

## Abstract

A semiconductor structure and a method for forming the semiconductor structure are disclosed. The semiconductor structure includes a dielectric layer and a transistor. The transistor is at least partially disposed in the dielectric layer. The transistor includes a gate electrode, a gate dielectric layer, a source electrode, a drain electrode and a semiconductor layer. The gate dielectric layer is disposed over the gate electrode. The source electrode and the drain electrode are disposed over the gate dielectric layer and contact the gate dielectric layer. The semiconductor layer is disposed over the gate dielectric layer.

## Claims

### Claim 1

A semiconductor structure, comprising:
a dielectric layer;
a transistor at least partially in the dielectric layer, wherein the transistor comprises:
a gate electrode;
a gate dielectric layer over the gate electrode;
a source electrode and a drain electrode over the gate dielectric layer and contacting the gate dielectric layer; and
a semiconductor layer over the gate dielectric layer and contacting the gate dielectric layer, wherein each of the source electrode and the drain electrode comprises a conductive material different from a material of the semiconductor layer, and a sidewall of the source electrode or a sidewall of the drain electrode contacts a sidewall of the semiconductor layer.

### Claim 2 (depends on 1)

The semiconductor structure according to claim 1, wherein a bottom surface of the source electrode or a bottom surface of the drain electrode is horizontally aligned with a bottom surface of the semiconductor layer.

### Claim 3 (depends on 1)

The semiconductor structure according to claim 1, wherein a length of the semiconductor layer is less than a length of the gate dielectric layer.

### Claim 4 (depends on 1)

The semiconductor structure according to claim 1, wherein a length of the semiconductor layer is less than or equal to a length of the gate electrode.

### Claim 5 (depends on 1)

The semiconductor structure according to claim 1, wherein the source electrode penetrates the semiconductor layer.

### Claim 6 (depends on 1)

The semiconductor structure according to claim 1, wherein a distance between the source electrode and the drain electrode is substantially equal to a length of the semiconductor layer.

### Claim 7 (depends on 1)

The semiconductor structure according to claim 1, wherein the dielectric layer includes an inter-metal dielectric layer.

### Claim 8 (depends on 1)

The semiconductor structure according to claim 1, wherein the transistor is disposed in an interconnection structure.

### Claim 9 (depends on 1)

The semiconductor structure according to claim 1, wherein the transistor is configured as a selector for a memory element.

### Claim 10 (depends on 9)

The semiconductor structure according to claim 9, further comprising:
a drain via electrically connecting the drain electrode of the transistor to the memory element.

### Claim 11

A memory selector, comprising:
a gate electrode embedded in a dielectric layer;
a gate dielectric layer over the gate electrode;
a semiconductor layer over the gate dielectric layer;
a source electrode and a drain electrode horizontally aligned with the semiconductor layer and contacting the gate dielectric layer, wherein each of the source electrode and the drain electrode comprises a conductive material different from a material of the semiconductor layer; and
a drain via electrically connecting the drain electrode to a memory element.

### Claim 12 (depends on 11)

The memory selector according to claim 11, wherein the memory element comprises a free layer, a reference layer and a tunnel barrier layer between the free layer and the reference layer.

### Claim 13 (depends on 11)

The memory selector according to claim 11, wherein a top surface of the source electrode or a top surface of the drain electrode is level with a top surface of the semiconductor layer.

### Claim 14 (depends on 11)

The memory selector according to claim 11, wherein a bottom surface of the drain via is level with a top surface of the semiconductor layer.

### Claim 15 (depends on 11)

The memory selector according to claim 11, wherein a thickness of the source electrode or a thickness of the drain electrode is substantially equal to a thickness of the semiconductor layer.

### Claim 16 (depends on 11)

The memory selector according to claim 11, wherein the source electrode and the drain electrode are embedded in the semiconductor layer.

### Claim 17

A semiconductor structure, comprising:
a substrate;
a transistor disposed over the substrate; and
a memory element disposed over the transistor and electrically connected to the transistor,
wherein the transistor comprises:
a gate electrode;
a source electrode and a drain electrode over the gate electrode; and
a semiconductor layer, wherein the source electrode and the drain electrode are embedded within the semiconductor layer, and wherein each of the source electrode and the drain electrode comprises a conductive material different from a material of the semiconductor layer.

### Claim 18 (depends on 17)

The semiconductor structure according to claim 17, wherein a top surface of the semiconductor layer is substantially aligned with a top surface of the drain electrode.

### Claim 19 (depends on 17)

The semiconductor structure according to claim 17, wherein the source electrode penetrates the semiconductor layer.

### Claim 20 (depends on 17)

The semiconductor structure according to claim 17, further comprising:
a gate dielectric layer in contact with the source electrode, the drain electrode, and the semiconductor layer.