# US 12,218,251 B2 · Semiconductor device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,218,251 B2 - Document ID: US12218251B2 - Status: Granted - Kind: B2 - Application number: 18/626,594 - Filed: 2024-04-04 - Published: 2024-07-25 - Granted: 2025-02-04 - Earliest claimed: 2011-09-29 - Assignees: Semiconductor Energy Laboratory Co., Ltd. - Applicants: Semiconductor Energy Laboratory Co., Ltd. - Inventors: Tatsuya Honda; Masashi Tsubuku; Yusuke Nonaka; Takashi Shimazu; Shunpei Yamazaki - Web page: https://patentgrep.com/patent/US12218251B2 ## CPC - H10D 30/6755: {Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate} - G02F 1/133345: {Insulating layers (G02F1/1335, G02F1/1337, G02F1/135, G02F1/136 take precedence)} - G02F 1/1337: Surface-induced orientation of the liquid crystal molecules, e.g. by alignment layers - G02F 1/13394: {spacers regularly patterned on the cell subtrate, e.g. walls, pillars (G02F1/133377 takes precedence)} - G02F 1/134309: {characterised by their geometrical arrangement} - H10D 30/6757: {characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile (TFTs having channel structures for preventing kink or snapback effects H10D30/6708; TFTs having lightly-doped source or drain extensions H10D30/6715)} - H10D 62/405: {Orientations of crystalline planes} - H10D 62/80: characterised by the materials - H10D 64/68: characterised by the insulator, e.g. by the gate insulator - H10D 86/423: {comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO} - H10D 86/60: wherein the TFTs are in active matrices - H10D 99/00: Subject matter not provided for in other groups of this subclass - G02F 2202/10: semiconductor - H10K 59/1213: {the pixel elements being TFTs} - H10P 14/3434: {being oxide semiconductor materials (Group IIB-VIA semiconductor materials H10P14/3424)} - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES - G02F: OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS - H10K: ORGANIC ELECTRIC SOLID-STATE DEVICES - H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10 ## Abstract A semiconductor device includes a gate electrode, a gate insulating film which includes oxidized material containing silicon and covers the gate electrode, an oxide semiconductor film provided to be in contact with the gate insulating film and overlap with at least the gate electrode, and a source electrode and a drain electrode electrically connected to the oxide semiconductor film. In the oxide semiconductor film, a first region which is provided to be in contact with the gate insulating film and have a thickness less than or equal to 5 nm has a silicon concentration lower than or equal to 1.0 at. %, and a region in the oxide semiconductor film other than the first region has lower silicon concentration than the first region. At least the first region includes a crystal portion. ## Claims ### Claim 1 A method for manufacturing a semiconductor device comprising an insulating film a gate electrode, an oxide semiconductor film, a source electrode, and a drain electrode the method comprising: wherein the oxide semiconductor film includes an indium oxide film, wherein the indium oxide film is formed by an atomic layer deposition method, wherein a concentration of carbon in the indium oxide film is lower than or equal to 1.0×1020 atoms/cm3, and wherein the indium oxide film includes a crystal portion. ### Claim 2 (depends on 1) The method for manufacturing the semiconductor device according to claim 1, wherein a channel formation region of the indium oxide film includes the crystal portion. ### Claim 3 (depends on 1) The method for manufacturing the semiconductor device according to claim 1, wherein the indium oxide film includes the crystal portion extending to a vicinity of a formed film surface. ### Claim 4 (depends on 1) The method for manufacturing the semiconductor device according to claim 1, wherein a thickness of the indium oxide film is greater than 5 nm and less than or equal to 200 nm. ### Claim 5 (depends on 1) The method for manufacturing the semiconductor device according to claim 1, wherein the oxide semiconductor film is included in a bottom gate transistor, wherein the insulating film comprises a region serving as a gate insulating film of the bottom gate transistor, wherein the insulating film comprises silicon oxide, wherein the insulating film comprises a region in contact with the indium oxide film, and wherein an average surface roughness (Ra) of the insulating film is less than or equal to 0.15 nm. ### Claim 6 (depends on 1) The method for manufacturing the semiconductor device according to claim 1, wherein the oxide semiconductor film is included in a bottom gate transistor, wherein the insulating film comprises a region serving as a gate insulating film of the bottom gate transistor, wherein the insulating film comprises silicon oxide, and wherein the insulating film comprises a region in contact with the indium oxide film. ### Claim 7 (depends on 1) The method for manufacturing the semiconductor device according to claim 1, wherein the concentration of carbon in the indium oxide film is lower than or equal to 1.0×1019 atoms/cm3. ### Claim 8 (depends on 1) The method for manufacturing the semiconductor device according to claim 1, wherein the oxide semiconductor film is included in a bottom gate transistor, wherein the insulating film comprises a region serving as a gate insulating film of the bottom gate transistor, wherein the insulating film comprises a hafnium oxide film and a silicon oxide film over the hafnium oxide film, and wherein the silicon oxide film comprises a region in contact with the indium oxide film. ### Claim 9 A method for manufacturing a semiconductor device comprising an insulating film, a gate electrode, an oxide semiconductor film, a source electrode, and a drain electrode, the method comprising: wherein the oxide semiconductor film includes an indium oxide film, wherein the indium oxide film is formed by an atomic layer deposition method, wherein the indium oxide film has a first region and a second region, wherein the first region is provided to be in contact with the insulating film and has a thickness less than or equal to 5 nm, wherein a concentration of silicon contained in the second region is lower than a concentration of silicon contained in the first region, wherein a concentration of carbon in the first region is lower than or equal to 1.0×1020 atoms/cm3, and wherein the indium oxide film includes a crystal portion. ### Claim 10 (depends on 9) The method for manufacturing the semiconductor device according to claim 9, wherein a channel formation region of the indium oxide film includes the crystal portion. ### Claim 11 (depends on 9) The method for manufacturing the semiconductor device according to claim 9, wherein the indium oxide film includes the crystal portion extending to a vicinity of a formed film surface. ### Claim 12 (depends on 9) The method for manufacturing the semiconductor device according to claim 9, wherein a thickness of the indium oxide film is greater than 5 nm and less than or equal to 200 nm. ### Claim 13 (depends on 9) The method for manufacturing the semiconductor device according to claim 9, wherein the oxide semiconductor film is included in a bottom gate transistor, wherein the insulating film comprises a region serving as a gate insulating film of the bottom gate transistor, wherein the insulating film comprises silicon oxide, wherein the insulating film comprises a region in contact with the indium oxide film, and wherein an average surface roughness (Ra) of the insulating film is less than or equal to 0.15 nm. ### Claim 14 (depends on 9) The method for manufacturing the semiconductor device according to claim 9, wherein the oxide semiconductor film is included in a bottom gate transistor, wherein the insulating film comprises a region serving as a gate insulating film of the bottom gate transistor, wherein the insulating film comprises silicon oxide, and wherein the insulating film comprises a region in contact with the indium oxide film. ### Claim 15 (depends on 9) The method for manufacturing the semiconductor device according to claim 9, wherein the concentration of carbon in the first region is lower than or equal to 1.0×1019 atoms/cm3. ### Claim 16 (depends on 9) The method for manufacturing the semiconductor device according to claim 9, wherein the oxide semiconductor film is included in a bottom gate transistor, wherein the insulating film comprises a region serving as a gate insulating film of the bottom gate transistor, wherein the insulating film comprises a hafnium oxide film and a silicon oxide film over the hafnium oxide film, and wherein the silicon oxide film comprises a region in contact with the indium oxide film. ### Claim 17 A method for manufacturing a semiconductor device comprising an insulating film, a gate electrode, an oxide semiconductor film, a source electrode, and a drain electrode, the method comprising: wherein the oxide semiconductor film includes an indium oxide film, wherein the indium oxide film is formed by an atomic layer deposition method, wherein heat treatment is performed after forming the indium oxide film, wherein a concentration of carbon in the indium oxide film is lower than or equal to 1.0×1020 atoms/cm3, and wherein the indium oxide film includes a crystal portion. ### Claim 18 (depends on 17) The method for manufacturing the semiconductor device according to claim 17, wherein excess hydrogen in the indium oxide film is removed by the heat treatment. ### Claim 19 (depends on 17) The method for manufacturing the semiconductor device according to claim 17, wherein the indium oxide film is highly purified by the heat treatment. ### Claim 20 (depends on 17) The method for manufacturing the semiconductor device according to claim 17, wherein the indium oxide film becomes i-type by the heat treatment. ### Claim 21 (depends on 17) The method for manufacturing the semiconductor device according to claim 17, wherein the heat treatment is at a temperature higher than or equal to 200° C. and lower than or equal to 700° C. ### Claim 22 (depends on 17) The method for manufacturing the semiconductor device according to claim 17, wherein the heat treatment is performed with an RTA (Rapid Thermal Anneal) device, and wherein the RTA (Rapid Thermal Anneal) device is a GRTA (Gas Rapid Thermal Anneal) device or an LRTA (Lamp Rapid Thermal Anneal) device. ### Claim 23 (depends on 17) The method for manufacturing the semiconductor device according to claim 17, wherein a channel formation region of the indium oxide film includes the crystal portion. ### Claim 24 (depends on 17) The method for manufacturing the semiconductor device according to claim 17, wherein the indium oxide film includes the crystal portion extending to a vicinity of a formed film surface. ### Claim 25 (depends on 17) The method for manufacturing the semiconductor device according to claim 17, wherein a thickness of the indium oxide film is greater than 5 nm and less than or equal to 200 nm. ### Claim 26 (depends on 17) The method for manufacturing the semiconductor device according to claim 17, wherein the oxide semiconductor film is included in a bottom gate transistor, wherein the insulating film comprises a region serving as a gate insulating film of the bottom gate transistor, wherein the insulating film comprises silicon oxide, wherein the insulating film comprises a region in contact with the indium oxide film, and wherein an average surface roughness (Ra) of the insulating film is less than or equal to 0.15 nm. ### Claim 27 (depends on 17) The method for manufacturing the semiconductor device according to claim 17, wherein the oxide semiconductor film is included in a bottom gate transistor, wherein the insulating film comprises a region serving as a gate insulating film of the bottom gate transistor, wherein the insulating film comprises silicon oxide, and wherein the insulating film comprises a region in contact with the indium oxide film. ### Claim 28 (depends on 17) The method for manufacturing the semiconductor device according to claim 17, wherein the concentration of carbon in the indium oxide film is lower than or equal to 1.0×1019 atoms/cm3. ### Claim 29 (depends on 17) The method for manufacturing the semiconductor device according to claim 17, wherein the oxide semiconductor film is included in a bottom gate transistor, wherein the insulating film comprises a region serving as a gate insulating film of the bottom gate transistor, wherein the insulating film comprises a hafnium oxide film and a silicon oxide film over the hafnium oxide film, and wherein the silicon oxide film comprises a region in contact with the indium oxide film.