# US 12,218,247 B2 · Semiconductor device and manufacturing method of the semiconductor device

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- Number: US 12,218,247 B2
- Document ID: US12218247B2
- Status: Granted
- Kind: B2
- Application number: 17/606,830
- Filed: 2020-04-27
- Published: 2022-07-07
- Granted: 2025-02-04
- Earliest claimed: 2019-05-10
- Assignees: Semiconductor Energy Laboratory Co., Ltd.
- Applicants: Semiconductor Energy Laboratory Co., Ltd.
- Inventors: Shunpei Yamazaki; Ryota Hodo; Tetsuya Kakehata; Shinya Sasagawa
- Web page: https://patentgrep.com/patent/US12218247B2

## CPC

- H10D 30/6755: {Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate}
- H10P 50/20: Dry etching; Plasma etching; Reactive-ion etching
- H10B 12/00: Dynamic random access memory [DRAM] devices
- H10B 41/70: the floating gate being an electrode shared by two or more components
- H10D 30/031: {of thin-film transistors [TFT]}
- H10D 30/6734: {having gate electrodes arranged on both top and bottom sides of the channel, e.g. dual-gate TFTs}
- H10D 84/038: {using silicon technology, e.g. SiGe}
- H10D 84/813: {Combinations of field-effect devices and capacitor only}
- H10D 87/00: Integrated devices comprising both bulk components and either SOI or SOS components on the same substrate
- H10D 88/00: Three-dimensional [3D] integrated devices
- H10D 88/01: {Manufacture or treatment}
- H10P 50/283: {by chemical means}
- H10P 52/00: Grinding, lapping or polishing of wafers, substrates or parts of devices
- H10P 52/403: {of conductive or resistive materials}
- H10P 95/70: Chemical treatments
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10B: ELECTRONIC MEMORY DEVICES

## Abstract

A transistor with a high on-state current and a semiconductor device with high productivity are provided. Included are a first oxide, a second oxide, a third oxide, and a fourth oxide over a first insulator; a first conductor over the third oxide; a second conductor over the fourth oxide; a second insulator over the first conductor; a third insulator over the second conductor; a fifth oxide positioned over the second oxide and between the third oxide and the fourth oxide; a sixth oxide over the fifth oxide; a fourth insulator over the sixth oxide; a third conductor over the fourth insulator; and a fifth insulator over the first insulator to the third insulator. The fifth oxide includes a region in contact with the second oxide to the fourth oxide and the first insulator. The sixth oxide includes a region in contact with the fifth oxide, the first conductor, and the second conductor. The fourth insulator includes a region in contact with at least the sixth oxide, the third conductor, and the fifth insulator.

## Claims

### Claim 1

A method for manufacturing a semiconductor device, comprising the steps of:
depositing a first insulator;
depositing a first oxide film, a second oxide film, and a third oxide film in this order over the first insulator;
performing first heat treatment;
depositing a first conductive film, a first insulating film, and a second conductive film in this order over the third oxide film;
processing the first oxide film, the second oxide film, the third oxide film, the first conductive film, the first insulating film, and the second conductive film into island shapes to form a first oxide, a second oxide, a first oxide layer, a first conductive layer, a first insulating layer, and a second conductive layer;
removing the second conductive layer;
depositing a fifth insulator over the first insulator, the first oxide, the second oxide, the first oxide layer, the first conductive layer, and the first insulating layer;
depositing a sixth insulator over the fifth insulator;
forming an opening reaching the second oxide in the first oxide layer, the first conductive layer, the first insulating layer, the fifth insulator, and the sixth insulator;
forming, through the formation of the opening, a third oxide and a fourth oxide from the first oxide layer, a first conductor and a second conductor from the first conductive layer, and a seventh insulator and an eighth insulator from the first insulating layer;
performing second heat treatment;
depositing a fourth oxide film over the sixth insulator and in the opening;
depositing a fifth oxide film over the fourth oxide film;
removing, by a dry etching method, the fourth oxide film and the fifth oxide film deposited on side surfaces of the fifth insulator to the eighth insulator in the opening;
removing the fourth oxide film and the fifth oxide film over the sixth insulator;
forming a fifth oxide and a sixth oxide by leaving the fourth oxide film and the fifth oxide film on a bottom portion of the opening;
depositing a second insulating film over the sixth oxide and the sixth insulator;
depositing a third conductive film over the second insulating film; and
forming a ninth insulator and a third conductor in the opening by polishing the third conductive film and the second insulating film by a CMP method until the sixth insulator is reached.

### Claim 2 (depends on 1)

The method for manufacturing a semiconductor device according to claim 1,
wherein the dry etching method is performed at a pressure of higher than or equal to 66.5 Pa.

### Claim 3

A method for manufacturing a semiconductor device, comprising the steps of:
depositing a first insulator;
depositing a first oxide film, a second oxide film, and a third oxide film in this order over the first insulator;
depositing a first conductive film, a first insulating film, and a second conductive film in this order over the third oxide film;
processing the first oxide film, the second oxide film, the third oxide film, the first conductive film, the first insulating film, and the second conductive film into island shapes to form a first oxide, a second oxide, a first oxide layer, a first conductive layer, a first insulating layer, and a second conductive layer;
removing the second conductive layer;
depositing a fifth insulator over the first insulator, the first oxide, the second oxide, the first oxide layer, the first conductive layer, and the first insulating layer;
depositing a sixth insulator over the fifth insulator;
forming an opening reaching the second oxide in the first oxide layer, the first conductive layer, the first insulating layer, the fifth insulator, and the sixth insulator;
forming, through the formation of the opening, a third oxide and a fourth oxide from the first oxide layer, a first conductor and a second conductor from the first conductive layer, and a seventh insulator and an eighth insulator from the first insulating layer;
depositing a fourth oxide film over the sixth insulator and in the opening;
depositing a fifth oxide film over the fourth oxide film;
removing, by a dry etching method, the fourth oxide film and the fifth oxide film deposited on side surfaces of the fifth insulator to the eighth insulator in the opening;
removing the fourth oxide film and the fifth oxide film over the sixth insulator;
forming a fifth oxide and a sixth oxide by leaving the fourth oxide film and the fifth oxide film on a bottom portion of the opening;
depositing a second insulating film over the sixth oxide and the sixth insulator;
depositing a third conductive film over the second insulating film; and
forming a ninth insulator and a third conductor in the opening by polishing the third conductive film and the second insulating film by a CMP method until the sixth insulator is reached.

### Claim 4 (depends on 3)

The method for manufacturing a semiconductor device according to claim 3,
wherein the dry etching method is performed at a pressure of higher than or equal to 66.5 Pa.