# US 12,218,245 B2 · Thin film transistor and light-emitting diode backplane > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,218,245 B2 - Document ID: US12218245B2 - Status: Granted - Kind: B2 - Application number: 17/419,354 - Filed: 2021-05-31 - Published: 2024-01-25 - Granted: 2025-02-04 - Earliest claimed: 2021-05-21 - Assignees: Tcl China Star Optoelectronics Technology Co., Ltd. - Applicants: TCL China Star Optoelectronics Technology Co., Ltd. - Inventors: Xi Cheng - Web page: https://patentgrep.com/patent/US12218245B2 ## CPC - H10D 30/6728: {Vertical TFTs} - H10D 30/6733: {Multi-gate TFTs} - H10D 30/6757: {characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile (TFTs having channel structures for preventing kink or snapback effects H10D30/6708; TFTs having lightly-doped source or drain extensions H10D30/6715)} - H10D 86/481: {integrated with passive devices, e.g. auxiliary capacitors} - H10D 86/60: wherein the TFTs are in active matrices - H10W 90/00: Package configurations - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 ## Abstract The application discloses a thin film transistor and a light-emitting diode (LED) backplane. The thin film transistor includes: a first gate, a first insulating layer, a first source, a semiconductor layer, a first drain, a second insulating layer, and a second gate; the first insulating layer covers the first gate; the first source, the semiconductor layer, and the first drain are all disposed at a side of the first insulating layer away from the first gate; the second insulating layer covers the first drain, the semiconductor layer, and the first source; and the second gate is disposed on a surface of a side of the second insulating layer away from the first gate, wherein the first source, the semiconductor layer, and the first drain jointly constitute a vertical channel structure. ## Claims ### Claim 1 A thin film transistor, comprising: a first gate; a first insulating layer covering the first gate; a first source disposed at a side of the first insulating layer away from the first gate in a vertical direction perpendicular to an upper surface of the first gate; a semiconductor layer disposed at the side of the first insulating layer away from the first gate; a first drain disposed at the side of the first insulating layer away from the first gate; a second insulating layer covering the first drain, the semiconductor layer, and the first source; and a second gate disposed on a surface of a side of the second insulating layer away from the first gate in the vertical direction, wherein the first source, the semiconductor layer, and the first drain jointly constitute a vertical channel structure, the first source is electrically connected to a surface of a side of the semiconductor layer close to the first gate through a first conductive film, the first drain is electrically connected to a surface of a side of the semiconductor layer away from the first gate through a second conductive film, the first conductive film is a silver nanowire film, and the second conductive film is a silver nanowire film, wherein in a horizontal direction parallel to the upper surface of the first gate, the first source and the semiconductor layer are spaced apart and the second insulating layer is disposed between the first source and the semiconductor layer, and wherein the semiconductor layer does not overlap the first source in the vertical direction. ### Claim 2 (depends on 1) The thin film transistor according to claim 1, wherein the first source and the semiconductor layer are both disposed on a surface of the side of the first insulating layer away from the first gate, the first conductive film extends from a surface of the first source to the surface of the side of the semiconductor layer close to the first gate, and at least partially covers the surface of the first source and at least partially covers the surface of the side of the semiconductor layer close to the first gate. ### Claim 3 (depends on 2) The thin film transistor according to claim 2, wherein the first conductive film is disposed on the first insulating layer, and the first source and the semiconductor layer are both disposed on the first conductive film. ### Claim 4 (depends on 2) The thin film transistor according to claim 2, wherein the first conductive film is disposed on a surface of the first source away from the first gate and the surface of the side of the first insulating layer away from the first gate, and the semiconductor layer is disposed on a surface of a side of the first conductive film on the first insulating layer away from the first gate. ### Claim 5 (depends on 1) The thin film transistor according to claim 1, wherein the first source is disposed on a surface of the side of the first insulating layer away from the first gate, the first conductive film is disposed on a surface of a side of the first source away from the first gate, and the semiconductor layer is disposed on a surface of a side of the first conductive film away from the first gate. ### Claim 6 (depends on 1) The thin film transistor according to claim 1, wherein the first drain is stacked on the surface of the side of the semiconductor layer away from the first gate, and the second conductive film is disposed between the first drain and the semiconductor layer. ### Claim 7 A thin film transistor, comprising: a first gate; a first insulating layer covering the first gate; a first source disposed at a side of the first insulating layer away from the first gate in a vertical direction perpendicular to an upper surface of the first gate; a semiconductor layer disposed at the side of the first insulating layer away from the first gate; a first drain disposed at the side of the first insulating layer away from the first gate; a second insulating layer covering the first drain, the semiconductor layer, and the first source; and a second gate disposed on a surface of a side of the second insulating layer away from the first gate in the vertical direction, wherein the first source, the semiconductor layer, and the first drain jointly constitute a vertical channel structure, wherein in a horizontal direction parallel to the upper surface of the first gate, the first source and the semiconductor layer are spaced apart and the second insulating layer is disposed between the first source and the semiconductor layer, and wherein the semiconductor layer does not overlap the first source in the vertical direction. ### Claim 8 (depends on 7) The thin film transistor according to claim 7, wherein the first source is electrically connected to a surface of a side of the semiconductor layer close to the first gate, and the first drain is electrically connected to a surface of a side of the semiconductor layer away from the first gate. ### Claim 9 (depends on 8) The thin film transistor according to claim 8, wherein the first source is electrically connected to the surface of the side of the semiconductor layer close to the first gate through a first conductive film, and the first conductive film has at least one through hole. ### Claim 10 (depends on 9) The thin film transistor according to claim 9, wherein the first conductive film is an indium tin oxide film with the at least one through hole or a metal film with the at least one through hole. ### Claim 11 (depends on 9) The thin film transistor according to claim 9, wherein the first conductive film is a silver nanowire film. ### Claim 12 (depends on 9) The thin film transistor according to claim 9, wherein the first source and the semiconductor layer are both disposed on a surface of the side of the first insulating layer away from the first gate, the first conductive film extends from a surface of the first source to the surface of the side of the semiconductor layer close to the first gate, and at least partially covers the surface of the first source and at least partially covers the surface of the side of the semiconductor layer close to the first gate. ### Claim 13 (depends on 9) The thin film transistor according to claim 9, wherein the first source is disposed on a surface of the side of the first insulating layer away from the first gate, the first conductive film is disposed on a surface of a side of the first source away from the first gate, and the semiconductor layer is disposed on a surface of a side of the first conductive film away from the first gate. ### Claim 14 (depends on 9) The thin film transistor according to claim 9, wherein the first drain is disposed on the surface of the side of the semiconductor layer away from the first gate and partially covers the semiconductor layer, an orthographic projection of the second gate at least partially overlaps an orthographic projection of the semiconductor layer, and the orthographic projection of the second gate does not overlap an orthographic projection of the first drain. ### Claim 15 (depends on 9) The thin film transistor according to claim 9, wherein the first drain is stacked on the surface of the side of the semiconductor layer away from the first gate, and a second conductive film is disposed between the first drain and the semiconductor layer, and the second conductive film has at least one through hole. ### Claim 16 (depends on 15) The thin film transistor according to claim 15, wherein the second conductive film is an indium tin oxide film with the at least one through hole or a metal film with the at least one through hole. ### Claim 17 A light-emitting diode (LED) backplane, comprising at least one thin film transistor, wherein each of the at least one thin film transistor comprising: a first gate; a first insulating layer covering the first gate; a first source disposed at a side of the first insulating layer away from the first gate in a vertical direction perpendicular to an upper surface of the first gate; a semiconductor layer disposed at the side of the first insulating layer away from the first gate; a first drain disposed at the side of the first insulating layer away from the first gate; a second insulating layer covering the first drain, the semiconductor layer, and the first source; and a second gate disposed on a surface of a side of the second insulating layer away from the first gate in the vertical direction, wherein the first source, the semiconductor layer, and the first drain jointly constitute a vertical channel structure, the first source is electrically connected to a surface of a side of the semiconductor layer close to the first gate through a first conductive film, the first drain is electrically connected to a surface of a side of the semiconductor layer away from the first gate through a second conductive film, the first conductive film is a silver nanowire film, and the second conductive film is a silver nanowire film, wherein in a horizontal direction parallel to the upper surface of the first gate, the first source and the semiconductor layer are spaced apart and the second insulating layer is disposed between the first source and the semiconductor layer, and wherein the semiconductor layer does not overlap the first source in the vertical direction, and wherein the thin film transistor serves as a driving thin film transistor of an LED. ### Claim 18 (depends on 17) The LED backplane according to claim 17, wherein the LED is a mini-LED. ### Claim 19 (depends on 17) The LED backplane according to claim 17, wherein the LED backplane comprises a two transistors and one capacitor (2T1C) circuit structure, and the 2T1C circuit structure comprises: the driving thin film transistor; a switching thin film transistor, comprising a third gate, a second source, and a second drain, wherein the third gate is configured to receive a first scan signal, and the second source is configured to receive a data signal; a storage capacitor, wherein a terminal of the storage capacitor is connected to a second drain of the switching thin film transistor, and another terminal of the storage capacitor is grounded; and the light-emitting diode (LED), wherein the first gate of the driving thin film transistor is connected to the second drain of the switching thin film transistor, the second gate of the driving thin film transistor is configured to receive a second scan signal, the first source of the driving thin film transistor is connected to a terminal of the LED, another terminal of the LED is configured to receive a working voltage signal, and the first drain of the driving thin film transistor is grounded.