# US 12,218,232 B2 · Semiconductor device including compound and nitride members

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- Number: US 12,218,232 B2
- Document ID: US12218232B2
- Status: Granted
- Kind: B2
- Application number: 17/652,971
- Filed: 2022-03-01
- Published: 2023-03-02
- Granted: 2025-02-04
- Earliest claimed: 2021-08-25
- Assignees: Kabushiki Kaisha Toshiba
- Applicants: Kabushiki Kaisha Toshiba
- Inventors: Daimotsu Kato; Hiroshi Ono; Yosuke Kajiwara; Aya Shindome; Akira Mukai; Po-Chin Huang; Masahiko Kuraguchi; Tatsuo Shimizu
- Web page: https://patentgrep.com/patent/US12218232B2

## CPC

- H10D 30/475: {having wider bandgap layer formed on top of lower bandgap active layer, e.g. undoped barrier HEMTs such as i-AlGaN/GaN HEMTs}
- H10D 62/40: Crystalline structures
- H10D 62/402: {Amorphous materials}
- H10D 62/85: being Group III-V materials, e.g. GaAs
- H10D 62/8503: {Nitride Group III-V materials, e.g. AlN or GaN}
- H10D 30/0413: {of FETs having charge-trapping gate insulators, e.g. MNOS transistors}
- H10D 30/47: having two-dimensional [2D] charge carrier gas channels, e.g. nanoribbon FETs or high electron mobility transistors [HEMT]
- H10D 30/4732: {using Group III-V semiconductor material}
- H10D 30/6894: {having one gate at least partly in a trench}
- H10D 30/69: IGFETs having charge trapping gate insulators, e.g. MNOS transistors
- H10D 30/699: {having the gate at least partly formed in a trench}
- H10D 64/513: {within recesses in the substrate, e.g. trench gates, groove gates or buried gates}
- H10D 64/681: {having a compositional variation, e.g. multilayered}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

A semiconductor device includes first to third electrodes, a semiconductor member, first and second insulating members, a compound member, and a nitride member. The third electrode is between the first and second electrodes. The semiconductor member includes first and second semiconductor regions. The first semiconductor region includes first to fifth partial regions. The second semiconductor region includes first and second semiconductor portions. The first insulating member includes first and second insulating portions. The first semiconductor portion is between the fourth partial region and the first insulating portion. The second semiconductor portion is between the fifth partial region and the second insulating portion. The compound member includes first to third compound portions. The nitride member includes first to third nitride portions. The second insulating member includes first and second insulating regions. The first and second insulating regions are between the nitride regions and the third electrode.

## Claims

### Claim 1

A semiconductor device, comprising:
a first electrode;
a second electrode;
a third electrode, a position of the third electrode in a first direction being between a position of the first electrode in the first direction and a position of the second electrode in the first direction, the first direction being from the first electrode toward the second electrode;
a semiconductor member including a first semiconductor region and a second semiconductor region,
the first semiconductor region including Alx1Ga1-x1N (0≤x1<1), the first semiconductor region including a first partial region, a second partial region, a third partial region, a fourth partial region, and a fifth partial region, a second direction from the first partial region toward the first electrode crossing the first direction, a direction from the second partial region toward the second electrode being along the second direction, a direction from the third partial region toward the third electrode being along the second direction, a position of the fourth partial region in the first direction being between a position of the first partial region in the first direction and a position of the third partial region in the first direction, a position of the fifth partial region in the first direction being between the position of the third partial region in the first direction and a position of the second partial region in the first direction,
the second semiconductor region including Alx2Ga1-x2N (0<x2≤1, x1<x2), the second semiconductor region including a first semiconductor portion and a second semiconductor portion;
a first insulating member including silicon and oxygen, the first insulating member including a first insulating portion and a second insulating portion, the first semiconductor portion being between the fourth partial region and the first insulating portion, the second semiconductor portion being between the fifth partial region and the second insulating portion;
a compound member including Alx3Ga1-x3N (0<x3≤1, x1<x3), the compound member including a first compound portion, a second compound portion, and a third compound portion;
a nitride member including Alx4Ga1-x4N (0<x4≤1, x1<x4<x3) or Iny1Aly2Ga1-y1-y2N (0<y1≤1, 0≤y2<x3, y1+y2≤1), the nitride member including a first nitride portion, a second nitride portion, and a third nitride portion,
the first compound portion being between the third partial region and the third electrode in the second direction, the first nitride portion being between the first compound portion and the third electrode in the second direction,
the second compound portion being between the first semiconductor portion and the third electrode in the first direction, the second nitride portion being between the second compound portion and the third electrode in the first direction,
the first semiconductor portion being between the fourth partial region and the third nitride portion,
the third compound portion being between the first semiconductor portion and the third nitride portion,
crystallinity of the first compound portion being higher than crystallinity of the third compound portion, crystallinity of the first nitride portion being higher than crystallinity of the third nitride portion; and
a second insulating member including a first insulating region and a second insulating region, the first insulating region being between the first nitride portion and the third electrode in the second direction, the second insulating region being between the second nitride portion and the third electrode in the first direction.

### Claim 2 (depends on 1)

The device according to claim 1, wherein
at least a portion of the first compound portion includes crystals,
at least a portion of the third compound portion is amorphous,
at least a portion of the first nitride portion includes crystals,
at least a portion of the third nitride portion is amorphous.

### Claim 3 (depends on 1)

The device according to claim 1, wherein
crystallinity of the second compound portion is higher than the crystallinity of the third compound portion.

### Claim 4 (depends on 1)

The device according to claim 1, wherein
crystallinity of the second nitride portion is higher than the crystallinity of the third nitride portion.

### Claim 5 (depends on 1)

The device according to claim 1, wherein
at least a portion of the first insulating region is between the fourth partial region and the fifth partial region in the first direction.

### Claim 6 (depends on 1)

The device according to claim 1, wherein
at least a portion of the third electrode is between the fourth partial region and the fifth partial region in the first direction.

### Claim 7 (depends on 1)

The device according to claim 1, wherein
the second insulating member further includes a third insulating region, and
the third nitride portion is between the third compound portion and the third insulating region.

### Claim 8 (depends on 1)

The device according to claim 1, wherein
the compound member further includes a fourth compound portion and a fifth compound portion,
the nitride member further includes a fourth nitride portion and a fifth nitride portion,
the second insulating member further includes a fourth insulating region and a fifth insulating region,
the fourth compound portion is between the third electrode and the second semiconductor portion in the first direction, the fourth nitride portion is between the third electrode and the fourth compound portion in the first direction,
the second semiconductor portion is between the fifth partial region and the fifth nitride portion,
the fifth compound portion is between the second semiconductor portion and the fifth nitride portion, and
the fifth nitride portion is between the fifth compound portion and the fifth insulating region.

### Claim 9 (depends on 8)

The device according to claim 8, wherein
the crystallinity of the first compound portion is higher than crystallinity of the fifth compound portion, and the crystallinity of the first nitride portion is higher than crystallinity of the fifth nitride portion.

### Claim 10 (depends on 9)

The device according to claim 9, wherein
crystallinity of the fourth compound portion is higher than the crystallinity of the fifth compound portion, and crystallinity of the fourth nitride portion is higher than the crystallinity of the fifth nitride portion.

### Claim 11 (depends on 1)

The device according to claim 1, wherein
the compound member further includes a sixth compound portion and a seventh compound portion,
the nitride member further include a sixth nitride portion and a seventh nitride portion,
the sixth compound portion is between the fourth partial region and the first insulating region in the first direction,
the sixth nitride portion is between the sixth compound portion and the first insulating region in the first direction,
the seventh compound portion is between the first insulating region and the fifth partial region in the first direction, and
the seventh nitride portion is between the first insulating region and the seventh compound portion in the first direction.

### Claim 12 (depends on 1)

The device according to claim 1, wherein
the second insulating member includes silicon and oxygen,
the second insulating member does not include nitrogen, alternatively
a concentration of nitrogen included in the second insulating member is lower than a concentration of nitrogen included in the first insulating member.

### Claim 13 (depends on 1)

The device according to claim 1, wherein
a thickness of the first compound portion along the second direction is not less than 1 nm and not more than 10 nm.

### Claim 14 (depends on 1)

The device according to claim 1, wherein
a thickness of the first nitride portion along the second direction is not less than 1 nm and not more than 10 nm.

### Claim 15 (depends on 1)

The device according to claim 1, wherein
the third partial region includes a first surface facing the first compound portion,
the second semiconductor portion includes a second surface facing the first insulating portion, and
a distance along the second direction between a position of the first surface along the second direction and a position of the second surface along the second direction is not less than 60 nm.

### Claim 16 (depends on 1)

The device according to claim 1, wherein
the x4 is lower than the x2.

### Claim 17 (depends on 1)

The device according to claim 1, wherein
an absolute value of a difference between the x1 and the x4 is more than 0 and not more than 0.5.

### Claim 18 (depends on 1)

The device according to claim 1, wherein
an absolute value of a difference between the x2 and the x4 is not less than 0 and not more than 0.5.

### Claim 19 (depends on 1)

The device according to claim 1, wherein
an absolute value of a difference between the x2 and the x3 is not less than 0 and not more than 0.8.

### Claim 20 (depends on 1)

The device according to claim 1, wherein
the x1 is not less than 0 and less than 0.05,
the x2 is not less than 0.05 and not more than 0.3, and
the x3 is more than 0.05 and not more than 1.
