# US 12,218,167 B2 · Solid-state imaging device and electronic device

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- Number: US 12,218,167 B2
- Document ID: US12218167B2
- Status: Granted
- Kind: B2
- Application number: 17/281,452
- Filed: 2019-08-16
- Published: 2021-12-30
- Granted: 2025-02-04
- Earliest claimed: 2018-10-11
- Assignees: Sony Semiconductor Solutions Corporation
- Applicants: Sony Semiconductor Solutions Corporation
- Inventors: Kentaro Akiyama; Junichiro Fujimagari
- Web page: https://patentgrep.com/patent/US12218167B2

## CPC

- H10F 39/811: {Interconnections}
- H04N 25/70: SSIS architectures; Circuits associated therewith
- H10F 39/018: {of hybrid image sensors}
- H10F 39/809: {of hybrid image sensors}
- H10P 14/40: of conductive or resistive materials
- H10W 20/01: {Manufacture or treatment}
- H10W 20/40: Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
- H10F: INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H04N: PICTORIAL COMMUNICATION, e.g. TELEVISION
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

To provide a solid-state imaging device capable of further improving quality. Provided is a solid-state imaging device including: a first semiconductor element having a first semiconductor layer provided with a first through via and a photoelectric conversion unit configured to photoelectrically convert light that has been incident, a connection part that is wider than the first through via and is provided outside a region where the photoelectric conversion unit is provided on a surface of the first semiconductor layer on a side for receiving the light, connection wiring provided on the surface and configured to connect the first through via and the connection part, and a first passivation layer formed on the surface side; a second semiconductor element mounted on the first semiconductor element by the connection part; and a first guard ring formed on an outer peripheral portion of the first semiconductor element to surround the first semiconductor element. In the solid-state imaging device, at least a part of the first guard ring is arranged outside the first semiconductor layer and above a second semiconductor layer formed in substantially the same layer as the first semiconductor layer, and the first guard ring is arranged outside the first passivation layer and below a second passivation layer formed in substantially the same layer as the first passivation layer.

## Claims

### Claim 1

A solid-state imaging device, comprising:
a first semiconductor element that includes:
a first semiconductor layer that includes:
a first through via; and
a photoelectric conversion unit in a region of the first semiconductor layer, wherein the photoelectric conversion unit is configured to photoelectrically convert light incident on a light incident surface side of the first semiconductor layer;
a connection part that is wider than the first through via, wherein
the connection part is outside the region of the first semiconductor layer that includes the photoelectric conversion unit,
the connection part includes a first metal layer and a second metal layer different from the first metal layer, and
the second metal layer is on the first metal layer;
a connection wiring on the first semiconductor layer, wherein the connection wiring connects the first through via and the connection part; and
a first passivation layer on the light incident surface side, wherein the first metal layer and the second metal layer are between the first passivation layer and the first semiconductor layer;
a second semiconductor element on the first semiconductor element, wherein the connection part is between the first semiconductor element and the second semiconductor element;
a second semiconductor layer;
a second passivation layer;
a first guard ring on an outer peripheral portion of the first semiconductor element, wherein
the first guard ring surrounds the first semiconductor element,
at least a part of the first guard ring is outside the first semiconductor layer and above the second semiconductor layer, and
the first guard ring is outside the first passivation layer and below the second passivation layer; and
a plurality of third guard rings below the second semiconductor layer, wherein
at least a first of the plurality of third guard rings is connected in series to the first guard ring, and
at least a second of the plurality of third guard rings is connected to the second semiconductor layer.

### Claim 2 (depends on 1)

The solid-state imaging device according to claim 1, wherein the first guard ring is connected to the second semiconductor layer.

### Claim 3 (depends on 1)

The solid-state imaging device according to claim 1, wherein the first guard ring is connected to the second passivation layer.

### Claim 4 (depends on 1)

The solid-state imaging device according to claim 1, wherein the first guard ring is a metal stack.

### Claim 5 (depends on 1)

The solid-state imaging device according to claim 1, wherein the first guard ring includes:
at least one metal layer; and
a second through via that penetrates the second semiconductor layer.

### Claim 6 (depends on 1)

The solid-state imaging device according to claim 1, wherein the first guard ring includes:
at least one metal layer;
a second through via that penetrates the second semiconductor layer; and
a via that connects the at least one metal layer and the second through via.

### Claim 7 (depends on 1)

The solid-state imaging device according to claim 1, wherein the first guard ring includes:
a third metal layer having a recess; and
a metal member that extends in a direction substantially perpendicular to the third metal layer, wherein
the recess is connected to the second semiconductor layer, and
the third metal layer having the recess is connected to the metal member.

### Claim 8 (depends on 1)

The solid-state imaging device according to claim 1, further comprising a second guard ring that penetrates the second semiconductor layer, wherein
the second guard ring includes an insulating film,
the second guard ring is on an outer peripheral portion of the first guard ring, and
the second guard ring surrounds the first guard ring.

### Claim 9 (depends on 1)

The solid-state imaging device according to claim 1, wherein
the plurality of third guard rings is on the outer peripheral portion of the first semiconductor element, and
the plurality of third guard rings surround the first semiconductor element.

### Claim 10

An electronic device, comprising:
a solid-state imaging device that includes:
a first semiconductor element that includes:
a first semiconductor layer that includes:
a first through via; and
a photoelectric conversion unit in a region of the first semiconductor layer, wherein the photoelectric conversion unit is configured to photoelectrically convert light incident on a light incident surface side of the first semiconductor layer;
a connection part that is wider than the first through via, wherein
the connection part is outside the region of the first semiconductor layer that includes the photoelectric conversion unit,
the connection part includes a first metal layer and a second metal layer different from the first metal layer, and
the second metal layer is on the first metal layer;
a connection wiring on the first semiconductor layer, wherein the connection wiring connects the first through via and the connection part; and
a first passivation layer on the light incident surface side, wherein the first metal layer and the second metal layer are between the first passivation layer and the first semiconductor layer;
a second semiconductor element on the first semiconductor element, wherein the connection part is between the first semiconductor element and the second semiconductor element;
a second semiconductor layer;
a second passivation layer;
a first guard ring on an outer peripheral portion of the first semiconductor element, wherein
the first guard ring surrounds the first semiconductor element,
the first guard ring is outside the first semiconductor layer and above the second semiconductor layer, and
the first guard ring is outside the first passivation layer and below the second passivation layer; and
a plurality of third guard rings below the second semiconductor layer, wherein
at least a first of the plurality of third guard rings is connected in series to the first guard ring, and
at least a second of the plurality of third guard rings is connected to the second semiconductor layer.

### Claim 11 (depends on 1)

The solid-state imaging device according to claim 1, further comprising:
a first wiring on a first side of the first semiconductor layer; and
a second wiring on a second side of the first semiconductor layer, wherein
the second side is opposite to the first side,
the first metal layer and the second metal layer are on the first wiring, and
the connection wiring is connected to the second wiring via the first through via.