# US 12,218,157 B2 · Optical receiver comprising monolithically integrated photodiode and transimpedance amplifier

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- Number: US 12,218,157 B2
- Document ID: US12218157B2
- Status: Granted
- Kind: B2
- Application number: 17/785,989
- Filed: 2020-12-04
- Published: 2023-01-19
- Granted: 2025-02-04
- Earliest claimed: 2019-12-19
- Assignees: ElectroPhotonic-IC Inc.
- Applicants: ElectroPhotonic-IC Inc.
- Inventors: Lawrence E. Tarof; William A. Hagley; Gudmundur A. Hjartarson; John William Mitchell Rogers
- Web page: https://patentgrep.com/patent/US12218157B2

## CPC

- H10F 39/103: {the at least one element covered by H10F30/00 having potential barriers, e.g. integrated devices comprising photodiodes or phototransistors}
- H10F 77/413: {directly associated or integrated with the devices, e.g. back reflectors (directly associated or integrated with photovoltaic cells H10F77/42)}
- H04B 10/69: Electrical arrangements in the receiver
- H10F 30/223: the potential barrier being a PIN barrier
- H10F 77/124: comprising only Group III-V materials, e.g. GaAs
- H10F 77/953: {for devices having potential barriers}
- H04B 10/60: Receivers
- H10F: INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H04B: TRANSMISSION

## Abstract

An optical receiver comprises a monolithically integrated pin photodiode (PIN) and transimpedance amplifier (TIA). The TIA comprises InP heterojunction bipolar transistors (HBT) fabricated from a first plurality of layers of an epitaxial layer stack grown on a SI:InP substrate; the PIN is fabricated from a second plurality of layers of the epitaxial layer stack. The p-contact of the PIN is directly connected to the input of the TIA to reduce PIN capacitance CPIN. The TIA capacitance CTIA may be matched to CPIN. Device parameters comprising: a thickness of the absorption layer, window area, and an optional mirror thickness of the PIN; device capacitance CPIN+CTIA; and feedback resistance RF of the TIA; are optimized to performance specifications comprising a specified sensitivity and responsivity at an operational wavelength. This design approach enables cost-effective fabrication an integrated PIN-TIA, for applications such as a 1577 nm receiver for an ONU for 10G-PON.

## Claims

### Claim 1

An optical receiver comprising a monolithically integrated photodiode (PD) and transimpedance amplifier (TIA), wherein:
an epitaxial layer stack is formed on a semi-insulating indium phosphide (SI:InP) substrate;
the TIA comprises InP heterojunction bipolar transistors (HBT) formed by a first plurality of semiconductor layers of the epitaxial layer stack formed on the SI:InP substrate;
the PD comprises a p-i-n diode (PIN) formed by a second plurality of semiconductor layers of the epitaxial layer stack, comprising an n-layer, an i-layer and a p-layer, the second plurality of semiconductor layers being formed on top of the first plurality of semiconductor layers of the epitaxial layer stack;
a p-contact of the PIN is directly interconnected by a conductive trace to an input of the TIA, to provide a device capacitance CPIN of the PIN, and a capacitance CTIA of the TIA; and
device parameters comprising values of: CPIN, CTIA, a thickness ti of the i-layer, an area of the PIN; and a transimpedance feedback resistance RF of the TIA are selected to provide an integrated PIN-TIA meeting performance specifications comprising a specified sensitivity and responsivity at an operational wavelength.

### Claim 2 (depends on 1)

The optical receiver of claim 1 wherein the i-layer comprises InGaAs.

### Claim 3 (depends on 1)

The optical receiver of claim 1, wherein the i-layer is selected from materials of the group comprising InGaAs and other absorption materials within the InGaAlAsP penternary system.

### Claim 4 (depends on 1)

The optical receiver of claim 1, wherein values of CPIN and CTIA provide at least one of:
a) CPIN is matched to CTIA;
b) CPIN is approximately equal to CTIA; and
c) a minimum combined capacitance (CPIN+CTIA).

### Claim 5 (depends on 1)

The optical receiver of claim 1, wherein CPIN is ≤50fF.

### Claim 6 (depends on 1)

The optical receiver of claim 1, wherein CPIN is ≤30fF.

### Claim 7 (depends on 1)

The optical receiver of claim 1, wherein CPIN is ≤15fF.

### Claim 8 (depends on 1)

The optical receiver of claim 1, wherein the specified sensitivity and responsivity meet performance specifications for a receiver of an Optical Network Unit (ONU) for 10G PON.

### Claim 9 (depends on 8)

The optical receiver of claim 8, wherein said device parameters are optimized for an operational wavelength of 1577 nm.

### Claim 10 (depends on 1)

The optical receiver of claim 1, wherein the specified sensitivity and responsivity meet performance specifications for a receiver of an Optical Line Terminal (OLT) of a 10GPON.

### Claim 11 (depends on 10)

The optical receiver of claim 10, wherein said device parameters are optimized for operation at 1270 nm.

### Claim 12 (depends on 1)

The optical receiver of claim 1, wherein the specified sensitivity is equal to or better than −28 dBm.

### Claim 13 (depends on 1)

The optical receiver of claim 1, wherein the specified sensitivity is equal to or better than −30 dBm.

### Claim 14 (depends on 1)

The optical receiver of claim 1, wherein the specified responsivity is ≥0.6 A/W.

### Claim 15 (depends on 1)

The optical receiver of claim 1, wherein the specified responsivity is ≥0.8 A/W.

### Claim 16 (depends on 1)

The optical receiver of claim 1, wherein the specified responsivity is ≥1.0 A/W.

### Claim 17 (depends on 1)

The optical receiver of claim 1, having a Quantum Efficiency≥85% or more preferably ≥90%.

### Claim 18 (depends on 1)

The optical receiver of claim 1, wherein the HBT are characterized by fT≥100 GHz, the TIA has a bandwidth (BW) of ≥7.5 GHZ, CPIN is ≤50fF, CTIA is ≤50fF and RF≥1500Ω.

### Claim 19 (depends on 18)

The optical receiver of claim 18, wherein CPIN is ≤30fF, and CTIA is ≤30fF.

### Claim 20 (depends on 18)

The optical receiver of claim 18, wherein CPIN is ≤15fF, and CTIA is ≤15fF.

### Claim 21 (depends on 1)

The optical receiver of claim 1, wherein:
the p-layer comprises one of a single layer and a multilayer structure;
the i-layer comprises one of a single layer and a multilayer structure; and
the n-layer comprises one of a single layer and a multilayer structure.

### Claim 22 (depends on 1)

The optical receiver of claim 1, wherein the PIN comprises a vertical PIN having a top facet window.

### Claim 23 (depends on 22)

The optical receiver of claim 22, comprising a mirror underlying the i-layer, to create a dual-pass through the i-layer.

### Claim 24 (depends on 23)

The optical receiver of claim 23, wherein the mirror comprises a multi-layer quarter-wave stack of alternating high index and low index lattice matched materials.

### Claim 25 (depends on 23)

The optical receiver of claim 23, wherein said device parameters comprise a mirror thickness tm of the multi-layer quarter wave stack, and wherein the thickness ti of the i-layer and the mirror thickness tm are selected to obtain a required Quantum Efficiency.

### Claim 26 (depends on 22)

The optical receiver of claim 22, comprising at least one of:
a) the top facet window of the PIN comprises an anti-reflection coating optimized for the operational wavelength;
b) a p+ cap layer of the PIN is selected to be substantially transparent at the operational wavelength; and
c) the p+ cap layer is a material selected to have a thickness and optical properties that reduce or minimize optical losses rather than reducing or minimizing sheet resistance and contact resistance for the p-contact.

### Claim 27

An optical receiver for one of an OLT (Optical Line Terminal) and ONU (Optical Network Unit) of a 10G Passive Optical Network (PON) comprising:
a monolithically integrated photodiode (PD) and a transimpedance amplifier (TIA), wherein:
an epitaxial layer stack is formed on a semi-insulating indium phosphide (SI:InP) substrate;
the TIA comprises InP (indium phosphide) heterojunction bipolar transistors (HBT) formed by a first plurality of semiconductor layers of the epitaxial layer stack grown on the SI:InP substrate;
the PD comprises a p-i-n diode (PIN) formed by a second plurality of semiconductor layers of the epitaxial layer stack comprising an n-layer, an i-layer and a p-layer, the second plurality of semiconductor layers being formed on top of the first plurality of semiconductor layers of the epitaxial stack;
a p-contact of the PIN diode is directly interconnected by a conductive trace to an input of the TIA; and
the i-layer comprises absorption material selected for an operational wavelength of one of the OLT and the ONU.

### Claim 28 (depends on 27)

The optical receiver of claim 27, for an ONU, wherein the i-layer comprises a single layer or a multi-layer structure comprising material that absorbs at 1577 nm.

### Claim 29 (depends on 27)

The optical receiver of claim 27, for an OLT wherein the i-layer comprises a single layer or a multi-layer structure comprising material that absorbs at 1270 nm.

### Claim 30 (depends on 27)

The optical receiver of claim 27, wherein the i-layer is selected from the group comprising InGaAs and other absorption materials of the InGaAlAsP materials system, which are lattice matched to InP.

### Claim 31 (depends on 1)

The optical receiver of claim 1, wherein the PIN comprises a waveguide PIN having a lateral facet window.

### Claim 32 (depends on 1)

The optical receiver of claim 1, wherein the first plurality of semiconductor layers and the second plurality of semiconductor layers are separated by a semi-insulating spacer.