# US 12,218,117 B2 · Method of forming package structure and package structure therefrom

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- Number: US 12,218,117 B2
- Document ID: US12218117B2
- Status: Granted
- Kind: B2
- Application number: 18/508,165
- Filed: 2023-11-13
- Published: 2024-03-07
- Granted: 2025-02-04
- Earliest claimed: 2020-04-01
- Assignees: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicants: Taiwan Semiconductor Manufacturing Company, Ltd.
- Inventors: Chih-Chien Pan; Chin-Fu Kao; Li-Hui Cheng; Szu-Wei Lu
- Web page: https://patentgrep.com/patent/US12218117B2

## CPC

- H10W 74/012: {of encapsulations on active surfaces of flip-chip devices, e.g. forming underfills}
- H10W 90/00: Package configurations
- G02B 6/13: Integrated optical circuits characterised by the manufacturing method
- G02B 6/4201: {Packages, e.g. shape, construction, internal or external details}
- H10W 74/014: {using batch processing}
- H10W 74/114: {by a substrate and the encapsulations}
- H10W 74/15: on active surfaces of flip-chip devices, e.g. underfills
- H10W 76/47: Solid or gel fillings
- H10W 70/66: Conductive materials thereof
- H10W 72/01225: {in solid form, e.g. by using a powder or by stud bumping}
- H10W 72/0198: {batch processes}
- H10W 72/07254: {changes in dispositions}
- H10W 72/07352: {changes in structures or sizes}
- H10W 72/07354: {changes in dispositions}
- H10W 72/222: {Multilayered bumps, e.g. a coating on top and side surfaces of a bump core}
- H10W 72/247: {Dispositions of multiple bumps}
- H10W 72/252: {comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu}
- H10W 72/29: Bond pads specially adapted therefor
- H10W 72/321: {Structures or relative sizes of die-attach connectors}
- H10W 72/347: {Dispositions of multiple die-attach connectors}
- H10W 72/354: {comprising polymers}
- H10W 72/922: {Bond pads being integral with underlying chip-level interconnections}
- H10W 72/952: {comprising metals or metalloids, e.g. PbSn, Ag or Cu}
- H10W 74/142: {the encapsulations exposing the passive side of the semiconductor body}
- H10W 90/28: the stacked chips having different sizes, e.g. chip stacks having a pyramidal shape
- H10W 90/295: {optical coupling}
- H10W 90/297: {characterised by the through-semiconductor vias [TSVs] in the stacked chips}
- H10W 90/722: {between stacked chips}
- H10W 90/724: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W 90/732: {between stacked chips}
- H10W 90/734: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W 99/00: Subject matter not provided for in other groups of this subclass
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- G02B: OPTICAL ELEMENTS, SYSTEMS OR APPARATUS

## Abstract

A package structure and methods of forming a package structure are provided. The package structure includes a first die, a second die, a wall structure and an encapsulant. The second die is electrically bonded to the first die. The wall structure is located aside the second die and on the first die. The wall structure is in contact with the first die and a hole is defined within the wall structure for accommodating an optical element. The encapsulant laterally encapsulates the second die and the wall structure.

## Claims

### Claim 1

A method of forming a package structure, comprising:
providing a semiconductor structure having a photonic element region;
electrically bonding a semiconductor die to the semiconductor structure;
forming a polymeric wall structure on the semiconductor structure and laterally aside the semiconductor die, wherein the polymeric wall structure is ring-shaped with a through hole defined by inner sidewalls of the polymeric wall structure, and the through hole exposes the photonic element region of the semiconductor structure;
forming a filling material to fill the through hole within the wall structure;
forming an encapsulant laterally wrapping around the semiconductor die, the polymeric wall structure and the filling material; and
removing the filling material to reveal the through hole.

### Claim 2 (depends on 1)

The method of claim 1, wherein the polymeric wall structure is formed by performing a dispensing process using a polymeric material different from a material of the filling material.

### Claim 3 (depends on 1)

The method of claim 1, further comprising performing a singulation process before removing the filling material.

### Claim 4 (depends on 3)

The method of claim 3, wherein the singulation process is performed cutting through the encapsulant without cutting the polymeric wall structure.

### Claim 5 (depends on 3)

The method of claim 3, wherein the singulation process is performed cutting through the encapsulant and cutting through the filling material, and a portion of the polymeric wall structure and a portion of the encapsulant covering the portion of the polymeric wall structure are removed by the singulation process.

### Claim 6 (depends on 1)

The method of claim 1, further comprising inserting an optical element into the through hole after removing the filling material.

### Claim 7 (depends on 1)

The method of claim 1, wherein the polymeric wall structure is remained during removing the filling material.

### Claim 8

A method of forming a package structure, comprising:
providing a semiconductor structure having a photonic element region and vias therein;
electrically bonding a semiconductor die to the semiconductor structure;
forming a polymeric wall on the semiconductor structure, above the photonic element region, and beside the semiconductor die, wherein the polymeric wall defines a through hole exposing the semiconductor structure;
forming a filling material to fill up the through hole;
forming an insulating encapsulant on the semiconductor structure to encapsulate the semiconductor die, the polymeric wall and the filling material;
performing a thinning process to a backside of the semiconductor structure until the vias are exposed to form through semiconductor vias (TSVs);
forming a redistribution structure on the thinned semiconductor structure and on the TSVs;
performing a singulation process to the redistribution structure and the thinned semiconductor structure; and
removing the filling material.

### Claim 9 (depends on 8)

The method of claim 8, further comprising performing a planarization process to remove the insulating encapsulant until the filling material is exposed before performing the singulation process.

### Claim 10 (depends on 8)

The method of claim 8, wherein performing a singulation process comprises performing a dicing process cutting through the redistribution structure, the thinned semiconductor structure and the insulating encapsulant without cutting the polymeric wall.

### Claim 11 (depends on 8)

The method of claim 8, wherein performing a singulation process comprises performing a dicing process cutting through the redistribution structure and the thinned semiconductor structure and cutting through the insulating encapsulant and the polymeric wall.

### Claim 12 (depends on 8)

The method of claim 8, wherein the polymeric wall is formed by performing a dispensing process using a polymeric material different from a material of the filling material.

### Claim 13 (depends on 8)

The method of claim 8, wherein the polymeric wall is remained during removing the filling material.

### Claim 14 (depends on 13)

The method of claim 13, further comprising inserting an optical element into the through hole after removing the filling material, wherein the optical element is optically coupled with the photonic element region.

### Claim 15

A package structure, comprising:
a first die including at least a photonic element;
a second die electrically bonded to the first die;
a wall structure, disposed on the first die and laterally aside the second die, wherein the wall structure defines a through hole exposing the at least photonic element;
an optical element disposed on the first die and inside the through hole of the wall structure, wherein the optical element is optically coupled with the at least one photonic element; and
an encapsulant laterally wrapping around the second die and the wall structure.

### Claim 16 (depends on 15)

The package structure of claim 15, wherein the wall structure includes a closed ring-shaped wall having four lateral sidewalls defining the through hole within the four lateral sidewalls of the polymer wall, and at least three lateral sidewalls are laterally encapsulated by the encapsulant.

### Claim 17 (depends on 15)

The package structure of claim 15, wherein the wall structure includes a closed ring-shaped wall having four lateral sidewalls defining the through hole within the four lateral sidewalls of the polymer wall, and the four lateral sidewalls are laterally encapsulated by the encapsulant.

### Claim 18 (depends on 15)

The package structure of claim 15, wherein the wall structure includes an open ring-shaped wall having three lateral sidewalls and the encapsulant laterally wraps around the three lateral sidewalls of the open ring-shaped wall without covering an open side of the wall structure.

### Claim 19 (depends on 15)

The package structure of claim 15, wherein the first die includes through vias extending through the first die.

### Claim 20 (depends on 19)

The package structure of claim 19, further comprising a redistribution structure located on the first die and connected with the through vias.