# US 12,218,085 B2 · Substrate, electronic device, and method for manufacturing substrate > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,218,085 B2 - Document ID: US12218085B2 - Status: Granted - Kind: B2 - Application number: 17/612,645 - Filed: 2020-04-08 - Published: 2022-07-28 - Granted: 2025-02-04 - Earliest claimed: 2019-05-30 - Assignees: Sony Semiconductor Solutions Corporation - Applicants: Sony Semiconductor Solutions Corporation - Inventors: Hirofumi Makino - Web page: https://patentgrep.com/patent/US12218085B2 ## CPC - H10W 40/735: {by melting or evaporation of solids} - H10W 44/20: at high-frequency [HF] or radio frequency [RF] - H01P 3/08: Microstrips; Strip lines - H01P 11/003: {Manufacturing lines with conductors on a substrate, e.g. strip lines, slot lines} - H05K 1/02: Details - H05K 3/46: Manufacturing multilayer circuits - H10W 40/73: for cooling by change of state - H10W 70/095: {of vias therein} - H10W 70/635: {Through-vias} - H10W 70/65: Shapes or dispositions of interconnections - H10W 40/228: {the projecting parts being wire-shaped or pin-shaped} - H10W 44/209: {Vertical interconnections, e.g. vias} - H10W 44/216: {Waveguides, e.g. strip lines} - H10W 72/536: {the connected ends being ball-shaped} - H10W 72/5363: {the connected ends being wedge-shaped} - H10W 72/884: {Die-attach connectors and bond wires} - H10W 90/734: {between a chip and a stacked insulating package substrate, interposer or RDL} - H10W 90/754: {between a chip and a stacked insulating package substrate, interposer or RDL} - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 - H01P: WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE (operating at optical frequencies G02B) - H05K: PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS ## Abstract In a wired substrate, heat dissipation performance is improved while an increase in an amount of metal is inhibited. The substrate includes a transmission line, an insulating material, and a heat storage material. In the substrate provided with the transmission line, the insulating material and the heat storage material, the transmission line transmits a predetermined electrical signal from a semiconductor chip. The transmission line for transmitting the predetermined electrical signal from the semiconductor chip is wired in the insulating material. The heat storage material has a higher thermal conductivity than the insulating material to which the transmission line is wired and accumulates latent heat accompanying phase transition that occurs within an operating temperature range of the semiconductor chip. ## Claims ### Claim 1 A substrate, comprising: an insulating material having a first thermal conductivity; a transmission line wired to the insulating material, wherein the transmission line is configured to transmit an electrical signal from a semiconductor chip; and a wiring layer that includes a heat storage material, wherein the transmission line is wired to the wiring layer, the heat storage material has a second thermal conductivity, the second thermal conductivity is higher than the first thermal conductivity, the heat storage material accumulates latent heat based on a phase transition of the heat storage material, and the phase transition occurs within an operating temperature range of the semiconductor chip. ### Claim 2 (depends on 1) The substrate according to claim 1, wherein the substrate includes a flexible substrate, the flexible substrate includes a base layer, the transmission line is wired to the base layer, and the base layer includes the insulating material. ### Claim 3 (depends on 1) The substrate according to claim 1, wherein the substrate includes a rigid substrate, and the wiring layer further includes: a core material; and a prepreg. ### Claim 4 (depends on 3) The substrate according to claim 3, wherein each of the core material and the prepreg includes the insulating material. ### Claim 5 (depends on 3) The substrate according to claim 3, wherein the prepreg includes each of the insulating material and the heat storage material. ### Claim 6 (depends on 3) The substrate according to claim 3, wherein the core material includes each of the insulating material and the heat storage material. ### Claim 7 (depends on 3) The substrate according to claim 3, further comprising a solder resist configured to cover a surface of the substrate, wherein the solder resist includes the heat storage material. ### Claim 8 An electronic device, comprising: a semiconductor chip; an insulating material having a first thermal conductivity; a transmission line wired to the insulating material, wherein the transmission line is configured to transmit an electrical signal from the semiconductor chip; and a wiring layer that includes a heat storage material, wherein the transmission line is wired to the wiring layer, the heat storage material has a second thermal conductivity, the second thermal conductivity is higher than the first thermal conductivity, the heat storage material accumulates latent heat based on a phase transition of the heat storage material, and the phase transition occurs within an operating temperature range of the semiconductor chip. ### Claim 9 A method for manufacturing a substrate, the method comprising: disposing, in a wiring layer of the substrate, a heat storage material that has a higher thermal conductivity than an insulating material of the substrate, wherein the heat storage material accumulates latent heat based on a phase transition of the heat storage material, and the phase transition occurs within an operating temperature range of a semiconductor chip; and wiring a transmission line to the insulating material, wherein the transmission line transmits an electrical signal from the semiconductor chip. ### Claim 10 (depends on 9) The method for manufacturing the substrate according to claim 9, further comprising wiring the transmission line to the wiring layer, wherein the wiring layer includes: a core material; and a prepreg. ### Claim 11 (depends on 9) The method for manufacturing the substrate according to claim 9, further comprising: coating a surface of the substrate with a solder resist, wherein the wiring layer includes: a core material; and a prepreg, and each of the core material and the prepreg includes the insulating material; and disposing the heat storage material in at least one of the solder resist, the core material, or the prepreg; and wiring the transmission line to the wiring layer.