# US 12,218,079 B2 · Semiconductor devices with reinforced substrates > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,218,079 B2 - Document ID: US12218079B2 - Status: Granted - Kind: B2 - Application number: 18/151,029 - Filed: 2023-01-06 - Published: 2023-05-18 - Granted: 2025-02-04 - Earliest claimed: 2020-09-04 - Assignees: Micron Technology, Inc. - Applicants: Micron Technology, Inc. - Inventors: Koustav Sinha; Shams U. Arifeen; Christopher Glancey - Web page: https://patentgrep.com/patent/US12218079B2 ## CPC - H10W 42/121: {protecting against mechanical damage (H10W76/00, H10W74/00 take precedence)} - H10W 70/099: {Connecting interconnections to insulating or insulated package substrates, interposers or redistribution layers} - H10W 74/117: {the substrate having spherical bumps for external connection} - H10W 76/40: Fillings or auxiliary members in containers, e.g. centering rings (fillings or auxiliary members for thermal protection or control in containers or encapsulations H10W40/70) - H10W 90/701: {characterised by the relative positions of pads or connectors relative to package parts} - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 ## Abstract Semiconductor devices having reinforcement structures configured to mitigate thermomechanical stresses, and associated systems and methods, are disclosed herein. In one embodiment, a semiconductor package includes a semiconductor die and a substrate coupled to the semiconductor die. The substrate can include a base structure and a reinforcement structure at least partially within a die shadow region of the substrate. The reinforcement structure can be at least partially surrounded by the base structure. The reinforcement structure has a higher stiffness than the base structure. ## Claims ### Claim 1 A method for manufacturing a semiconductor assembly, the method comprising: fabricating a substrate by: forming a recess in a base structure, and positioning a reinforcement structure at least partially in the recess, wherein the reinforcement structure has a higher stiffness than the base structure; and mounting a semiconductor die onto the substrate such that the semiconductor die is positioned at least partially over the reinforcement structure. ### Claim 2 (depends on 1) The method of claim 1 wherein the recess is formed by removing a portion of the base structure. ### Claim 3 (depends on 2) The method of claim 2 wherein the portion of the base structure is removed by cutting or drilling. ### Claim 4 (depends on 1) The method of claim 1 wherein the reinforcement structure is deposited, bonded, or laminated into the recess. ### Claim 5 (depends on 1) The method of claim 1 wherein the reinforcement structure is a pre-formed component that is inserted into the recess. ### Claim 6 (depends on 1) The method of claim 1 wherein the reinforcement structure is formed in situ within the recess. ### Claim 7 (depends on 1) The method of claim 1, further comprising coupling an array of conductive elements to the substrate. ### Claim 8 (depends on 7) The method of claim 7, further comprising aligning the substrate to the array such that the reinforcement structure is positioned over one or more conductive elements of the array. ### Claim 9 (depends on 7) The method of claim 7, further comprising mounting the substrate to a printed circuit board via the array. ### Claim 10 (depends on 1) The method of claim 1 wherein the reinforcement structure has a higher coefficient of thermal expansion than the base structure. ### Claim 11 (depends on 1) The method of claim 1 wherein an edge of the semiconductor die is positioned over or near the reinforcement structure. ### Claim 12 (depends on 1) The method of claim 1 wherein fabricating the substrate further comprises: forming a plurality of recesses in the base structure; and positioning a reinforcement structure in each of the recesses. ### Claim 13 (depends on 12) The method of claim 12, wherein the semiconductor die includes a plurality of corners, and wherein the plurality of recesses include recesses positioned beneath each corner of the semiconductor die. ### Claim 14 A method of manufacturing a semiconductor assembly comprising: forming a recess in a first substrate section; positioning a reinforcement structure in the recess, wherein the reinforcement structure has a higher stiffness than the first substrate section; forming a package substrate by coupling a second substrate section to the first substrate section such that the reinforcement structure is disposed between the first and second substrate sections; and mounting a semiconductor die on the package substrate. ### Claim 15 (depends on 14) The method of claim 14, wherein the first substrate section and the second substrate section, are coupled by laminating or bonding. ### Claim 16 (depends on 14) The method of claim 14, wherein the semiconductor die is mounted onto the package substrate above a die shadow region of the package substrate, and wherein the reinforcement structure is positioned at least partially within the die shadow region. ### Claim 17 (depends on 16) The method of claim 16, wherein a length of the reinforcement structure spans an entire length of an edge of the die shadow region. ### Claim 18 (depends on 14) The method of claim 14, wherein the reinforcement structure has circular or elliptical shape. ### Claim 19 (depends on 14) The method of claim 14, wherein the reinforcement structure is pre-formed prior to positioning the reinforcement structure in the recess. ### Claim 20 A method of manufacturing a semiconductor assembly comprising: forming a lower substrate section including a base material; forming a middle substrate section including a plurality of reinforcement structures and a portion of the base material adjacent to the plurality of reinforcement structures; forming an upper substrate section including the base material; assembling a package substrate by coupling the lower substrate section, the middle substrate section, and the upper substrate section; and mounting a semiconductor die on the package substrate.