# US 12,217,805 B2 · Reference voltage generating circuit and semiconductor memory device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,217,805 B2 - Document ID: US12217805B2 - Status: Granted - Kind: B2 - Application number: 17/903,617 - Filed: 2022-09-06 - Published: 2023-09-28 - Granted: 2025-02-04 - Earliest claimed: 2022-03-24 - Assignees: Kabushiki Kaisha Toshiba; Toshiba Electronic Devices & Storage Corporation - Applicants: Kabushiki Kaisha Toshiba; Toshiba Electronic Devices & Storage Corporation - Inventors: Osamu Hirabayashi - Web page: https://patentgrep.com/patent/US12217805B2 ## CPC - G11C 16/30: Power supply circuits - G05F 3/262: {using field-effect transistors only} - G11C 7/04: with means for avoiding disturbances due to temperature effects - G11C 7/062: {Differential amplifiers of non-latching type, e.g. comparators, long-tailed pairs} - G11C 7/227: {Timing of memory operations based on dummy memory elements or replica circuits} - G11C 16/26: Sensing or reading circuits; Data output circuits - G11C 16/32: Timing circuits - G11C: STATIC STORES (semiconductor memory devices H10B) - G05F: SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES ## Abstract A reference voltage generating circuit according to an embodiment includes: an original reference voltage generating unit that generates an original reference voltage; and a reference voltage correcting unit that decreases the original reference voltage as the temperature rises and outputs the original reference voltage as a reference voltage to a sense amplifier, and thus it is possible to perform highly reliable operation while the influence of the temperature is reduced. ## Claims ### Claim 1 A reference voltage generating circuit comprising: an original reference voltage generating unit that generates an original reference voltage; and a reference voltage correcting unit that decreases the original reference voltage as a temperature rises and outputs the original reference voltage that is decreased as a reference voltage to a sense amplifier, wherein the reference voltage correcting unit receives input of a control signal that varies as the temperature rises, and decreases the original reference voltage on a basis of the control signal, the control signal being input as a reference current control voltage for controlling enable timing of the sense amplifier. ### Claim 2 (depends on 1) The reference voltage generating circuit according to claim 1, wherein timing corresponding to a current value of a current accompanying application of the reference current control voltage is set as the enable timing. ### Claim 3 (depends on 2) The reference voltage generating circuit according to claim 2, wherein the current value of the current accompanying application of the reference current control voltage is higher than a current value at a predetermined reference temperature in a case where the temperature is higher than the predetermined reference temperature and is lower than the current value at the predetermined reference temperature in a case where the temperature is lower than the predetermined reference temperature. ### Claim 4 (depends on 1) The reference voltage generating circuit according to claim 1, wherein the reference voltage correcting unit sets the reference voltage to a high-temperature reference voltage lower than a first reference voltage at a predetermined reference temperature in a case where the temperature is higher than the predetermined reference temperature and sets the reference voltage to a low-temperature reference voltage higher than the first reference voltage at the predetermined reference temperature in a case where the temperature is lower than the predetermined reference temperature. ### Claim 5 (depends on 1) The reference voltage generating circuit according to claim 1, wherein the reference voltage correcting unit comprises a MOS transistor that pulls down the original reference voltage and sets the original reference voltage that is pulled down as the reference voltage, the MOS transistor being applied with the reference current control voltage at a gate terminal as a bias voltage. ### Claim 6 A semiconductor memory device comprising: a memory cell that stores data; a bit line that transmits a signal read from the memory cell; and a sense amplifier circuit that detects data stored in the memory cell on a basis of the signal transmitted through the bit line, wherein the sense amplifier circuit comprises: a sense amplifier that compares the signal transmitted through the bit line with a reference voltage and outputs a data detection signal; and a reference current generating circuit that generates and outputs a reference current control voltage; a sense timing generating circuit that controls timing at which a sense amplifier enable signal, for enabling the sense amplifier, is output from an output terminal on a basis of the reference current control voltage; and a reference voltage generating circuit comprising an original reference voltage generating unit that generates an original reference voltage and a reference voltage correcting unit that decreases the original reference voltage as a temperature rises and outputs the original reference voltage that is decreased as the reference voltage. ### Claim 7 (depends on 6) The semiconductor memory device according to claim 6, wherein the reference voltage correcting unit decreases the original reference voltage as the temperature rises on a basis of the reference current control voltage. ### Claim 8 (depends on 6) The semiconductor memory device according to claim 6, wherein the reference current generating circuit comprises: a current value setting unit that varies a set current value by trimming; and a current mirror circuit that duplicates a current corresponding to the set current value set by the current value setting unit and outputs the current as the reference current control voltage. ### Claim 9 (depends on 7) The semiconductor memory device according to claim 7, wherein the reference voltage correcting unit is applied with, as a control signal, a reference current control voltage for controlling enable timing of the sense amplifier. ### Claim 10 (depends on 9) The semiconductor memory device according to claim 9, wherein the reference voltage correcting unit sets timing corresponding to a current value of a current accompanying application of the reference current control voltage as the enable timing. ### Claim 11 (depends on 10) The semiconductor memory device according to claim 10, wherein the current value of the current accompanying application of the reference current control voltage is higher than a current value at a predetermined reference temperature in a case where the temperature is higher than the predetermined reference temperature and is lower than the current value at the predetermined reference temperature in a case where the temperature is lower than the predetermined reference temperature. ### Claim 12 (depends on 6) The semiconductor memory device according to claim 6, wherein the reference voltage correcting unit sets the reference voltage to a high-temperature reference voltage lower than a first reference voltage at a predetermined reference temperature in a case where the temperature is higher than the predetermined reference temperature and sets the reference voltage to a low-temperature reference voltage higher than the first reference voltage at the predetermined reference temperature in a case where the temperature is lower than the predetermined reference temperature. ### Claim 13 (depends on 6) The semiconductor memory device according to claim 6, wherein the reference voltage correcting unit comprises a MOS transistor that pulls down the original reference voltage and sets the original reference voltage that is pulled down as the reference voltage, the MOS transistor being applied with the reference current control voltage at a gate terminal as a bias voltage.