# US 12,217,694 B2 · Display device and method of manufacturing the same

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- Number: US 12,217,694 B2
- Document ID: US12217694B2
- Status: Granted
- Kind: B2
- Application number: 16/849,882
- Filed: 2020-04-15
- Published: 2021-02-25
- Granted: 2025-02-04
- Earliest claimed: 2019-08-20
- Assignees: Samsung Display Co., Ltd.
- Applicants: Samsung Display Co., Ltd.
- Inventors: Keun Woo Kim; Mee Jae Kang; Doo Na Kim; Yun Jung Oh; Yong Su Lee; Jae Hwan Chu
- Web page: https://patentgrep.com/patent/US12217694B2

## CPC

- G09G 3/3233: with pixel circuitry controlling the current through the light-emitting element
- G09G 3/3266: Details of drivers for scan electrodes
- G09G 3/20: for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix {no fixed position being assigned to or needed to be assigned to the individual characters or partial characters}
- H10D 86/0229: {characterised by control of the annealing or irradiation parameters}
- H10D 86/40: characterised by multiple TFTs
- H10D 86/425: {having different crystal properties in different TFTs or within an individual TFT}
- H10D 86/471: {having different architectures, e.g. having both top-gate and bottom-gate TFTs}
- H10D 86/60: wherein the TFTs are in active matrices
- G09G 2300/08: Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
- G09G 2300/0819: used for counteracting undesired variations, e.g. feedback or autozeroing
- G09G 2300/0842: forming a memory circuit, e.g. a dynamic memory with one capacitor
- G09G 2300/0861: with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
- G09G 2310/0286: Details of a shift registers arranged for use in a driving circuit
- G09G 2320/0295: by monitoring each display pixel
- G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00)
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

A display device includes: a plurality of pixels connected to gate lines and data lines; a gate driver to supply a gate signal to the gate lines; and a data driver to supply a data signal to the data lines. The gate driver includes: a first transistor including a first active layer at a first layer; and a second transistor including a second active layer at a second layer on the first layer.

## Claims

### Claim 1

A display device comprising:
a plurality of pixels connected to gate lines and data lines;
a gate driver to supply a gate signal to the gate lines; and
a data driver to supply a data signal to the data lines;
wherein the gate driver comprises:
a first transistor comprising a first active layer at a first layer;
a second transistor comprising a second active layer at a second layer on the first layer; and
an insulating layer on the second layer to cover the second active layer,
wherein the first and second transistors are different from pixel transistors of the plurality of pixels,
wherein the first active layer and the second active layer overlap with each other in a plan view and at least one contact hole penetrates through the insulating layer to expose a region of the first active layer that does not overlap with the second active layer in the plan view, and
wherein:
the first transistor further includes a first source electrode, a first drain electrode, and a first gate;
the second transistor further includes a second source electrode, a second drain electrode, and a second gate;
the at least one contact hole includes a first contact hole and a second contact hole;
the first source electrode fills the first contact hole such that the first source electrode and a portion of the first active layer are electrically connected to each other;
the first drain electrode fills the second contact hole such that the first drain electrode and another portion of the first active layer are electrically connected to each other;
the second source electrode is electrically connected to a portion of the second active layer;
the second drain electrode is electrically connected to another portion of the second active layer;
the display device further comprises:
a first insulating layer disposed between the first active layer and the first gate; and
a second insulating layer disposed between the first gate and the second active layer;
the insulating layer includes a third insulating layer, and a fourth insulating layer on the third insulating layer;
at least a portion of the third insulating layer is disposed between the second active layer and the second gate;
an upper surface of the fourth insulating layer contacts the first source electrode, the second source electrode, the first drain electrode, and the second drain electrode; and
the first source electrode, the second source electrode, the first drain electrode, and the second drain electrode are disposed on a same layer.

### Claim 2 (depends on 1)

The display device according to claim 1, wherein:
the gate lines comprise scan lines and light emission control lines; and
the gate driver comprises:
a scan driver to supply a scan signal to the scan lines; and
a light emission control driver to supply a light emission control signal to the light emission control lines.

### Claim 3 (depends on 2)

The display device according to claim 2, wherein:
the scan driver comprises a scan stage comprising the second transistor; and
the light emission control driver comprises a light emission control stage comprising the first transistor.

### Claim 4 (depends on 2)

The display device according to claim 2, wherein:
the scan driver comprises a scan stage comprising the first transistor; and
the light emission control driver comprises a light emission control stage comprising the second transistor.

### Claim 5 (depends on 1)

The display device according to claim 1, wherein:
the gate lines comprise scan lines;
the gate driver comprises scan stages to sequentially supply scan signals to the scan lines; and
each of the scan stages comprises:
an input circuit comprising the second transistor; and
an output circuit comprising the first transistor.

### Claim 6 (depends on 1)

The display device according to claim 1, wherein:
the gate lines comprise light emission control lines;
the gate driver comprises light emission control stages to sequentially supply light emission control signals to the light emission control lines; and
each of the light emission control stages comprises:
an input circuit comprising the second transistor; and
an output circuit comprising the first transistor.

### Claim 7 (depends on 1)

The display device according to claim 1, wherein the first transistor and the second transistor have different characteristics from each other.

### Claim 8 (depends on 7)

The display device according to claim 7, wherein the first transistor and the second transistor have different threshold voltages from each other.

### Claim 9 (depends on 8)

The display device according to claim 8, wherein:
each of the first transistor and the second transistor comprises a P-type transistor; and
the threshold voltage of the first transistor is greater than the threshold voltage of the second transistor.

### Claim 10 (depends on 1)

The display device according to claim 1, wherein the first active layer and the second active layer have different characteristics from each other.

### Claim 11 (depends on 10)

The display device according to claim 10, wherein the first active layer has a degree of crystallization that is less than a degree of crystallization of the second active layer.

### Claim 12 (depends on 1)

The display device according to claim 1, further comprising:
a display panel comprising a display area at which the pixels are disposed, and a non-display area at which the gate driver is disposed.

### Claim 13 (depends on 12)

The display device according to claim 12, wherein:
each of the pixels comprises a pixel transistor comprising a third active layer; and
the third active layer has a degree of crystallization that is less than a degree of crystallization of at least one active layer from among the first active layer and the second active layer.

### Claim 14 (depends on 1)

The display device according to claim 1, wherein another contact hole penetrates through the insulating layer and exposes a region of the second active layer that overlaps with the first active layer in the plan view, and the another contact hole is located between the contact hole and a gate of the second transistor in the plan view.