# US 12,217,675 B2 · Display substrate and display device

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- Number: US 12,217,675 B2
- Document ID: US12217675B2
- Status: Granted
- Kind: B2
- Application number: 17/791,814
- Filed: 2021-04-30
- Published: 2024-05-30
- Granted: 2025-02-04
- Earliest claimed: 2021-04-30
- Assignees: Chengdu Boe Optoelectronics Technology Co., Ltd.; Boe Technology Group Co., Ltd.
- Applicants: Chengdu Boe Optoelectronics Technology Co., Ltd.; Boe Technology Group Co., Ltd.
- Inventors: Yuanyou Qiu; Yao Huang; Qiwei Wang
- Web page: https://patentgrep.com/patent/US12217675B2

## CPC

- H10K 59/131: Interconnections, e.g. wiring lines or terminals
- G09G 3/3233: with pixel circuitry controlling the current through the light-emitting element
- G09G 2300/0819: used for counteracting undesired variations, e.g. feedback or autozeroing
- G09G 2300/0842: forming a memory circuit, e.g. a dynamic memory with one capacitor
- G09G 2310/08: Details of timing specific for flat panels, other than clock recovery
- G09G 2320/0233: Improving the luminance or brightness uniformity across the screen
- H10K: ORGANIC ELECTRIC SOLID-STATE DEVICES
- G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00)

## Abstract

A display substrate and a display device are provided. The display substrate includes a first display region and a first region at least partially surrounding the first display region; the first display region includes first light-emitting elements, the first region includes first pixel circuits and at least one first capacitance compensation structure, and the display substrate includes transparent wiring lines extending from the first region to the first display region; the first pixel circuit is electrically connected to the first light-emitting element through the transparent wiring line, and is configured to control a driving current flowing through the first pixel circuit, the transparent wiring line, and the first light-emitting element; and the first capacitance compensation structure is coupled to the transparent wiring line, and is configured to compensate for a parasitic capacitance caused by the transparent wiring line coupled to the first capacitance compensation structure.

## Claims

### Claim 1

A display substrate, comprising a first display region and a first region at least partially surrounding the first display region,
wherein the first display region comprises a plurality of first light-emitting elements;
the first region comprises a plurality of first pixel circuits and at least one first capacitance compensation structure;
the display substrate comprises a plurality of transparent wiring lines extending from the first region to the first display region;
at least one first pixel circuit of the plurality of first pixel circuits is electrically connected to at least one first light-emitting element of the plurality of first light-emitting elements through at least one transparent wiring line of the plurality of transparent wiring lines, and the at least one first pixel circuit is configured to control a driving current, for driving the at least one first light-emitting element to emit light, flowing through the at least one first pixel circuit, the at least one transparent wiring line, and the at least one first light-emitting element;
the at least one first capacitance compensation structure is coupled to at least one transparent wiring line of the plurality of transparent wiring lines, and is configured to compensate for a parasitic capacitance caused by the at least one transparent wiring line coupled to the at least one first capacitance compensation structure;
the first region comprises a second display region, the second display region at least partially surrounds the first display region, and the second display region comprises a second pixel unit;
the second pixel unit comprises a second light-emitting element and a second pixel circuit;
the second pixel circuit is electrically connected to the second light-emitting element, and is configured to control a driving current, for driving the second light-emitting element to emit light, flowing through the second pixel circuit and the second light-emitting element; and
in a case that the plurality of first pixel circuits and the at least one first capacitance compensation structure are in the second display region, in a plane of the display substrate, a first capacitance compensation structure is on a side of a first pixel circuit corresponding to the first capacitance compensation structure away from the first display region.

### Claim 2 (depends on 1)

The display substrate according to claim 1, wherein a compensation capacitance provided by the at least one first capacitance compensation structure is connected in parallel with the parasitic capacitance caused by the at least one transparent wiring line coupled to the at least one first capacitance compensation structure.

### Claim 3 (depends on 2)

The display substrate according to claim 2, wherein a sum of a value of the parasitic capacitance of the at least one transparent wiring line coupled to the at least one first capacitance compensation structure and a value of the compensation capacitance of the at least one first capacitance compensation structure is approximately equal to a target capacitance value.

### Claim 4 (depends on 3)

The display substrate according to claim 3, wherein the target capacitance value is greater than or equal to a maximum value among parasitic capacitance values of the plurality of transparent wiring lines.

### Claim 5 (depends on 4)

The display substrate according to claim 4, wherein a parasitic capacitance value of one or more transparent wiring lines comprised in the plurality of transparent wiring lines is approximately equal to the target capacitance value, and the one or more transparent wiring lines are not coupled to the at least one first capacitance compensation structure.

### Claim 6 (depends on 1)

The display substrate according to claim 1, wherein the plurality of transparent wiring lines are divided into a plurality of transparent wiring line groups, and each transparent wiring line group in the plurality of transparent wiring line groups comprises at least one transparent wiring line;
an average value of a parasitic capacitance value of the at least one transparent wiring line in the each transparent wiring line group serves as an average parasitic capacitance value of the each transparent wiring line group; and
the target capacitance value is greater than or equal to a maximum value among average parasitic capacitance values of the plurality of transparent wiring line groups.

### Claim 7 (depends on 6)

The display substrate according to claim 6, wherein an average parasitic capacitance value of at least one transparent wiring line group in the plurality of transparent wiring line groups is approximately equal to the target capacitance value, and at least one transparent wiring line in the at least one transparent wiring line group is not coupled to the at least one first capacitance compensation structure.

### Claim 8 (depends on 1)

The display substrate according to claim 1, wherein the first region comprises a peripheral region, the peripheral region is between the first display region and at least one side edge of the display substrate, and the plurality of first pixel circuits and the at least one first capacitance compensation structure are in the peripheral region.

### Claim 9 (depends on 1)

The display substrate according to claim 1, wherein the first region further comprises a peripheral region and the peripheral region is between the first display region and at least one side edge of the display substrate; and
a part of the plurality of first pixel circuits and a part of the at least one first capacitance compensation structure are in the peripheral region, and another part of the plurality of first pixel circuits and another part of the at least one first capacitance compensation structure are in the second display region.

### Claim 10 (depends on 1)

The display substrate according to claim 1, wherein the second display region further comprises a second capacitance compensation structure,
the second capacitance compensation structure is coupled to the second pixel circuit and the second light-emitting element, and is configured to provide a compensation capacitance to the second pixel circuit, and
a compensation capacitance value of the second capacitance compensation structure is approximately equal to a target capacitance value.

### Claim 11 (depends on 1)

The display substrate according to claim 1, wherein the display substrate comprises a base substrate, a pixel circuit layer, a transparent wiring line layer, and a light-emitting element layer, and the pixel circuit layer, the transparent wiring line layer, and the light-emitting element layer are sequentially arranged on the base substrate;
the pixel circuit layer comprises a gate electrode layer and a source-drain electrode layer;
each first light-emitting element in the plurality of first light-emitting elements is in the light-emitting element layer;
each first pixel circuit in the plurality of first pixel circuits comprises a thin film transistor, the thin film transistor comprises a gate electrode, a source electrode, and a drain electrode, the gate electrode is in the gate electrode layer, and at least one of the source electrode and the drain electrode is in the source-drain electrode layer;
each transparent wiring line in the plurality of transparent wiring lines is in the transparent wiring line layer; and
the at least one first capacitance compensation structure comprises a first capacitance electrode and a second capacitance electrode, and one of the first capacitance electrode and the second capacitance electrode is in the gate electrode layer, the source-drain electrode layer, or the transparent wiring line layer.

### Claim 12 (depends on 11)

The display substrate according to claim 11, wherein the source electrode or the drain electrode is electrically connected to one of the first capacitance electrode and the second capacitance electrode, and the source electrode or the drain electrode is further electrically connected to the first light-emitting element through the transparent wiring line.

### Claim 13 (depends on 12)

The display substrate according to claim 12, wherein the pixel circuit layer further comprises a capacitance electrode plate layer, and another of the first capacitance electrode and the second capacitance electrode is in the capacitance electrode plate layer.

### Claim 14 (depends on 13)

The display substrate according to claim 13, wherein the at least one first capacitance compensation structure comprises a plurality of capacitance compensation structures, and first capacitance electrodes or second capacitance electrodes of the plurality of capacitance compensation structures are an integral structure.

### Claim 15 (depends on 1)

The display substrate according to claim 1, wherein the display substrate comprises a first panel surface and a second panel surface, and the first panel surface is used for display during operation of the display substrate; and
the first display region is a transparent display region, and is configured to allow light incident from a side of the first panel surface to transmit to a side of the second panel surface.

### Claim 16

A display device, comprising a display substrate,
wherein the display substrate comprises a first display region and a first region at least partially surrounding the first display region;
the first display region comprises a plurality of first light-emitting elements;
the first region comprises a plurality of first pixel circuits and at least one first capacitance compensation structure;
the display substrate comprises a plurality of transparent wiring lines extending from the first region to the first display region;
at least one first pixel circuit of the plurality of first pixel circuits is electrically connected to at least one first light-emitting element of the plurality of first light-emitting elements through at least one transparent wiring line of the plurality of transparent wiring lines, and the at least one first pixel circuit is configured to control a driving current, for driving the at least one first light-emitting element to emit light, flowing through the at least one first pixel circuit, the at least one transparent wiring line, and the at least one first light-emitting element;
the at least one first capacitance compensation structure is coupled to at least one transparent wiring line of the plurality of transparent wiring lines, and is configured to compensate for a parasitic capacitance caused by the at least one transparent wiring line coupled to the at least one first capacitance compensation structure;
the first region comprises a second display region, the second display region at least partially surrounds the first display region, and the second display region comprises a second pixel unit;
the second pixel unit comprises a second light-emitting element and a second pixel circuit;
the second pixel circuit is electrically connected to the second light-emitting element, and is configured to control a driving current, for driving the second light-emitting element to emit light, flowing through the second pixel circuit and the second light-emitting element; and
in a case that the plurality of first pixel circuits and the at least one first capacitance compensation structure are in the second display region, in a plane of the display substrate, a first capacitance compensation structure is on a side of a first pixel circuit corresponding to the first capacitance compensation structure away from the first display region.

### Claim 17 (depends on 16)

The display device according to claim 16, further comprising a sensor,
wherein the display substrate comprises a first panel surface and a second panel surface, and the first panel surface is used for display during operation;
the first display region is a transparent display region, and is configured to allow light incident from a side of the first panel surface to transmit to a side of the second panel surface; and
the sensor is provided on the side of the second panel surface of the display substrate, an orthographic projection of the sensor on the display substrate at least partially overlaps with the first display region, and the sensor is configured to receive the light incident from the side of the first panel surface.

### Claim 18 (depends on 17)

The display device according to claim 17, wherein the sensor comprises at least one of a group consisting of an image sensor, an infrared sensor, and a distance sensor.
