# US 12,217,674 B2 · Pixel driving circuit, pixel driving method, and display panel for improving display uniformity through 7T2C pixel driving circuit > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,217,674 B2 - Document ID: US12217674B2 - Status: Granted - Kind: B2 - Application number: 17/790,203 - Filed: 2022-06-07 - Published: 2024-06-06 - Granted: 2025-02-04 - Earliest claimed: 2022-05-27 - Assignees: Tcl China Star Optoelectronics Technology Co., Ltd. - Applicants: TCL China Star Optoelectronics Technology Co., Ltd. - Inventors: Bin Liu - Web page: https://patentgrep.com/patent/US12217674B2 ## CPC - G09G 3/3233: with pixel circuitry controlling the current through the light-emitting element - G09G 2300/0852: being a dynamic memory with more than one capacitor - G09G 2320/0233: Improving the luminance or brightness uniformity across the screen - G09G 2320/045: Compensation of drifts in the characteristics of light emitting or modulating elements - G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00) ## Abstract Disclosed in embodiments of the present application are a pixel driving circuit, a pixel driving method, and a display panel, comprising a first thin film transistor, a second thin film transistor, a third thin film transistor, a fourth thin film transistor, a fifth thin film transistor, a sixth thin film transistor, a seventh thin film transistor, a first capacitor, a second capacitor, and a light-emitting device. The first thin film transistor is used as a driving thin film transistor of the light-emitting device. A threshold voltage of a driving thin film transistor in each pixel may be compensated. ## Claims ### Claim 1 A pixel driving circuit, comprising: a first thin film transistor, a second thin film transistor, a third thin film transistor, a fourth thin film transistor, a fifth thin film transistor, a sixth thin film transistor, a seventh thin film transistor, a first capacitor, a second capacitor, and a light-emitting device, the first thin film transistor configured as a driving thin film transistor of the light-emitting device; wherein a gate of the first thin film transistor is electrically connected to a first node, and a drain of the first thin film transistor is electrically connected to a second node; a gate of the second thin film transistor receives a first scan signal, a source of the second thin film transistor receives a data signal, and a drain of the second thin film transistor is electrically connected to the first node; a gate of the third thin film transistor receives a light-emitting controlling signal, and a drain of the third thin film transistor is electrically connected to a source of the first thin film transistor; a gate of the fourth thin film transistor receives the light-emitting controlling signal, a source of the fourth thin film transistor is electrically connected to the second node, and a drain of the fourth thin film transistor receives a ground voltage; a gate of the fifth thin film transistor receives a second scan signal, a source of the fifth thin film transistor is connected to the first node, and a drain of the fifth thin film transistor is electrically connected to the drain of the third thin film transistor; a gate of the sixth thin film transistor receives a third scan signal, a source of the sixth thin film transistor receives a power voltage, and a drain of the sixth thin film transistor is electrically connected to the first node; a gate of the seventh thin film transistor receives a fourth scan signal, a source of the seventh thin film transistor receives a reference signal, and a drain of the seventh thin film transistor is electrically connected to the second node; one end of the first capacitor is electrically connected to the first node, and another end of the first capacitor is electrically connected to the second node; one end of the second capacitor is electrically connected to the first node, and another end of the second capacitor is electrically connected to the drain of the second thin film transistor; and an anode of the light-emitting device receives the power voltage, and a cathode of the light-emitting device is electrically connected to a source of the third thin film transistor, voltage levels of the first scan signal, the second scan signal, the third scan signal, the fourth scan signal, the light-emitting controlling signal, and the data signal are configured to form different voltage level combinations to correspond to an initialization stage, a threshold voltage extraction stage, a data writing stage, and a light-emitting stage in sequence. ### Claim 2 (depends on 1) The pixel driving circuit according to claim 1, wherein during the initialization stage, all of the first scan signal, the third scan signal, and the fourth scan signal are at a high voltage level, and all of the second scan signal, the light-emitting controlling signal, and the data signal are at a low voltage level; a voltage level of the first node is the power voltage, and a voltage level of the second node is the reference signal. ### Claim 3 (depends on 1) The pixel driving circuit according to claim 1, wherein during the threshold voltage extraction stage, all of the first scan signal, the second scan signal, and the fourth scan signal are at a high voltage level, and all of the third scan signal, the light-emitting controlling signal, and the data signal are at a low voltage level; a voltage level of the first node is a sum of the reference signal and a threshold voltage, and a voltage level of the second node is the reference signal. ### Claim 4 (depends on 1) The pixel driving circuit according to claim 1, wherein during the data writing stage, all of the first scan signal, the fourth scan signal, and the data signal are at a high voltage level, and all of the second scan signal, the third scan signal, and the light-emitting controlling signal are at a low voltage level; a voltage level of the first node is a sum of a difference value between the high voltage level and a low voltage level of the data signal, and the reference signal and a threshold voltage, and a voltage level of the second node is the reference signal. ### Claim 5 (depends on 1) The pixel driving circuit according to claim 1, wherein during the light-emitting stage, the light-emitting controlling signal is at a high voltage level, and all of the first scan signal, the second scan signal, the third scan signal, the fourth scan signal, and the data signal are at a low voltage level; a voltage level of the second node is the ground voltage, and a voltage level of the first node is a sum of a difference value between a high voltage level and the low voltage level of the data signal, and a threshold voltage and the ground voltage. ### Claim 6 (depends on 5) The pixel driving circuit according to claim 5, wherein during the light-emitting stage, a current flowing through the first node and the second node is independent from the ground voltage. ### Claim 7 (depends on 6) The pixel driving circuit according to claim 6, wherein during the light-emitting stage, a current flowing through the light-emitting device is independent from a threshold voltage of the first thin film transistor. ### Claim 8 (depends on 1) The pixel driving circuit according to claim 1, wherein all of the first thin film transistor, the second thin film transistor, the third thin film transistor, the fourth thin film transistor, the fifth thin film transistor, the sixth thin film transistor, and the seventh thin film transistor are oxide semiconductor thin film transistors, low-temperature polysilicon thin film transistors, or amorphous silicon thin film transistors. ### Claim 9 (depends on 8) The pixel driving circuit according to claim 8, wherein the light-emitting device is an organic light-emitting diode. ### Claim 10 (depends on 1) The pixel driving circuit according to claim 1, wherein all of the first scan signal, the second scan signal, the third scan signal, the fourth scan signal, the light-emitting controlling signal, and the data signal are generated by an external timing controller. ### Claim 11 A pixel driving method applied to a pixel driving circuit comprising seven thin film transistors, two capacitors, and a light-emitting device, wherein a first one of the seven thin film transistors has a gate electrically connected to a first node, and a drain electrically connected to a second node; a second one of the seven thin film transistors has a drain electrically connected to the first node; a third one of the seven thin film transistors has a drain electrically connected to a source of the first thin film transistor; a fourth one of the seven thin film transistors has a source electrically connected to the second node; a fifth one of the seven thin film transistors has a source connected to the first node, and a drain electrically connected to the drain of the third thin film transistor; a sixth one of the seven thin film transistors has electrically connected to the first node; a seventh one of the seven thin film transistors has a drain electrically connected to the second node; a first one of the two capacitors has one end connected to the first node, and another end connected to the second node; a second one of the two capacitors has one end connected to the first node, and another end connected to the drain of the second thin film transistor; and the light-emitting device has a cathode connected to a source of the third thin film transistor; and the light-emitting device is driven by the first thin film transistor; and wherein the pixel driving method comprises: during an initialization stage, controlling all of a first scan signal received at a gate of the second thin film transistor, a third scan signal received at a gate of the six thin film transistor, and a fourth scan signal received at a gate of the seven thin film transistor to be at a high voltage level, and controlling all of a second scan signal received at a gate of the fifth thin film transistor, a light-emitting controlling signal received at a gate of the third thin film transistor and a gate of the fourth thin film transistor, and a data signal received at a source of the second thin film transistor to be at a low voltage level, so that a voltage level of the first node is a power voltage received at a source of the sixth thin film transistor and an anode of the light-emitting device, and a voltage level of the second node is a reference signal received at a source of the seventh thin film transistor; during a threshold voltage extraction stage, controlling all of the first scan signal, the second scan signal, and the fourth scan signal to be at the high voltage level, and controlling all of the third scan signal, the light-emitting controlling signal, and the data signal to be at the low voltage level, so that the voltage level of the first node is a sum of the reference signal and a threshold voltage, and the voltage level of the second node is the reference signal; during a data writing stage, controlling all of the first scan signal, the fourth scan signal, and the data signal to be at the high voltage level, and controlling all of the second scan signal, the third scan signal, and the light-emitting controlling signal to be at the low voltage level, so that the voltage level of the first node is a sum of a difference value between the high voltage level and the low voltage level of the data signal, and the reference signal and the threshold voltage, and the voltage level of the second node is the reference signal; and during a light-emitting stage, controlling the light-emitting controlling signal to be at the high voltage level, and controlling all of the first scan signal, the second scan signal, the third scan signal, the fourth scan signal, and the data signal to be at the low voltage level, so that the voltage level of the second node is a ground voltage received at a drain of the fourth thin transistor, and the voltage level of the first node is a sum of the difference value between the high voltage level and the low voltage level of the data signal, and the threshold voltage and the ground voltage. ### Claim 12 (depends on 11) The pixel driving method according to claim 11, wherein during the light-emitting stage, a current flowing through the first node and the second node is independent from the ground voltage. ### Claim 13 (depends on 12) The pixel driving method according to claim 12, wherein during the light-emitting stage, a current flowing through the light-emitting device is independent from a threshold voltage of the first thin film transistor. ### Claim 14 A display panel, comprising a pixel driving circuit, the pixel driving circuit comprising a first thin film transistor, a second thin film transistor, a third thin film transistor, a fourth thin film transistor, a fifth thin film transistor, a sixth thin film transistor, a seventh thin film transistor, a first capacitor, a second capacitor, and a light-emitting device, the first thin film transistor configured as a driving thin film transistor of the light-emitting device; wherein a gate of the first thin film transistor is electrically connected to a first node, and a drain of the first thin film transistor is electrically connected to a second node; a gate of the second thin film transistor receives a first scan signal, a source of the second thin film transistor receives a data signal, a drain of the second thin film transistor is electrically connected to the first node; a gate of the third thin film transistor receives a light-emitting controlling signal, and a drain of the third thin film transistor is electrically connected to a source of the first thin film transistor; a gate of the fourth thin film transistor receives the light-emitting controlling signal, a source of the fourth thin film transistor is electrically connected to the second node, and a drain of the fourth thin film transistor receives a ground voltage; a gate of the fifth thin film transistor receives a second scan signal, a source of the fifth thin film transistor is connected to the first node, and a drain of the fifth thin film transistor is electrically connected to the drain of the third thin film transistor; a gate of the sixth thin film transistor receives a third scan signal, a source of the sixth thin film transistor receives a power voltage, and a drain of the sixth thin film transistor is electrically connected to the first node; a gate of the seventh thin film transistor receives a fourth scan signal, a source of the seventh thin film transistor receives a reference signal, and a drain of the seventh thin film transistor is electrically connected to the second node; one end of the first capacitor is electrically connected to the first node, and another end of the first capacitor is electrically connected to the second node; one end of the second capacitor is electrically connected to the first node, and another end of the second capacitor is electrically connected to the drain of the second thin film transistor; and an anode of the light-emitting device receives the power voltage, and a cathode of the light-emitting device is electrically connected to a source of the third thin film transistor, voltage levels of the first scan signal, the second scan signal, the third scan signal, the fourth scan signal, the light-emitting controlling signal, and the data signal are configured to form different voltage level combinations to correspond to an initialization stage, a threshold voltage extraction stage, a data writing stage, and a light-emitting stage in sequence. ### Claim 15 (depends on 14) The display panel according to claim 14, wherein during the initialization stage, all of the first scan signal, the third scan signal, and the fourth scan signal are at a high voltage level, and all of the second scan signal, the light-emitting controlling signal, and the data signal are at a low voltage level; a voltage level of the first node is the power voltage, and a voltage level of the second node is the reference signal. ### Claim 16 (depends on 14) The display panel according to claim 14, wherein during the threshold voltage extraction stage, all of the first scan signal, the second scan signal, and the fourth scan signal are at a high voltage level, and all of the third scan signal, the light-emitting controlling signal, and the data signal are at a low voltage level; a voltage level of the first node is a sum of the reference signal and a threshold voltage, and a voltage level of the second node is the reference signal. ### Claim 17 (depends on 14) The display panel according to claim 14, wherein during the data writing stage, all of the first scan signal, the fourth scan signal, and the data signal are at a high voltage level, and all of the second scan signal, the third scan signal, and the light-emitting controlling signal are at a low voltage level; a voltage level of the first node is a sum of a difference value between the high voltage level and a low voltage level of the data signal, and the reference signal and a threshold voltage, and a voltage level of the second node is the reference signal. ### Claim 18 (depends on 14) The display panel according to claim 14, wherein during the light-emitting stage, the light-emitting controlling signal is at a high voltage level, and all of the first scan signal, the second scan signal, the third scan signal, the fourth scan signal, and the data signal are at a low voltage level; a voltage level of the second node is the ground voltage and a voltage level of the first node is a sum of a difference value between a high voltage level and the low voltage level of the data signal, and a threshold voltage and the ground voltage.