# US 12,217,662 B2 · Display device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,217,662 B2 - Document ID: US12217662B2 - Status: Granted - Kind: B2 - Application number: 18/585,494 - Filed: 2024-02-23 - Published: 2024-10-03 - Granted: 2025-02-04 - Earliest claimed: 2023-03-30 - Assignees: Samsung Display Co., Ltd. - Applicants: Samsung Display Co., LTD. - Inventors: Minseong Son; Sunjoon Hwang; Yunseong Kim; Boram Shin; Seung-Kyu Lee - Web page: https://patentgrep.com/patent/US12217662B2 ## CPC - G09G 3/32: semiconductive, e.g. using light-emitting diodes [LED] - G09G 3/3233: with pixel circuitry controlling the current through the light-emitting element - G09G 2310/08: Details of timing specific for flat panels, other than clock recovery - G09G 2330/028: Generation of voltages supplied to electrode drivers in a matrix display other than LCD - G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00) ## Abstract A display device includes: a display panel having a first region and a second region defined in the display panel, in which the second region is adjacent to the first region in a first direction. The display panel includes: a first pixel disposed in the first region, a second pixel disposed in the second region, a first bias voltage line electrically connected to the first pixel to transmit a first bias voltage, and a second bias voltage line electrically connected to the second pixel to transmit a second bias voltage. A time point, at which a level of the first bias voltage is changed, differs from a time point at which a level of the second bias voltage is changed, when the display panel operates at a first frame frequency. ## Claims ### Claim 1 A display device comprising: a display panel having a first region and a second region defined in the display panel, wherein the first region is adjacent to the second region in a certain direction, wherein the display panel includes: a first pixel disposed in the first region; a second pixel disposed in the second region; a first bias voltage line electrically connected to the first pixel to transmit a first bias voltage; and a second bias voltage line electrically connected to the second pixel to transmit a second bias voltage, wherein a time point, at which a level of the first bias voltage is changed, differs from a time point at which a level of the second bias voltage is changed, when the display panel operates at a first frame frequency. ### Claim 2 (depends on 1) The display device of claim 1, wherein the display panel operates a variable frame frequency including the first frame frequency and a second frame frequency higher than the first frame frequency. ### Claim 3 (depends on 1) The display device of claim 1, wherein one frame includes an active period, in which a data voltage is provided to each of the first pixel and the second pixel, and a plurality of blank periods provided consecutively to the active period, when the display panel operates at the first frame frequency. ### Claim 4 (depends on 3) The display device of claim 3, wherein the time point, at which the level of the first bias voltage is changed, is overlapped with the active period. ### Claim 5 (depends on 3) The display device of claim 3, wherein the time point, at which the level of the second bias voltage is changed, is overlapped with a boundary between the active period and the plurality of blank periods. ### Claim 6 (depends on 1) The display device of claim 1, wherein the first bias voltage and the second bias voltage are changed from a first level to a second level different from the first level, at the time point, at which the level of the first bias voltage is changed, and the time point at which the level of the second bias voltage is changed, respectively. ### Claim 7 (depends on 6) The display device of claim 6, wherein a period, in which the first bias voltage has the first level, is temporally in a non-overlap state with a period in which the second bias voltage has the first level. ### Claim 8 (depends on 6) The display device of claim 6, wherein the second level is higher than the first level. ### Claim 9 (depends on 6) The display device of claim 6, wherein the first level is higher than the second level. ### Claim 10 (depends on 1) The display device of claim 1, wherein a waveform of the first bias voltage is substantially the same as a waveform of the second bias voltage. ### Claim 11 (depends on 1) The display device of claim 1, wherein a phase of the first bias voltage differs from a phase of the second bias voltage. ### Claim 12 (depends on 1) The display device of claim 1, wherein each of the first pixel and the second pixel includes a light emitting element and a pixel circuit connected to the light emitting element, wherein the pixel circuit includes: a first transistor including a gate electrode connected to a first node, a first electrode, and a second electrode connected to a second node, a second transistor connected between a data line and the first electrode of the first transistor, in which an operation of the second transistor is controlled by a write scan signal provided to a write scan line, and a third transistor connected between the first electrode of the first transistor and the first or second bias voltage line, in which an operation of the third transistor is controlled by a bias scan signal provided to a bias scan line connected to a gate electrode of the third transistor, and wherein the write scan signal is activated to be in an active level by X times, the bias scan signal is activated to be in an active level by Y times greater than the X times, X is a positive integer equal to or greater than 1, and Y is a positive integer equal to or greater than 2. ### Claim 13 (depends on 12) The display device of claim 12, wherein the pixel circuit further includes: a fourth transistor connected between the first node and the second node, in which an operation of the fourth transistor is controlled by a compensation scan signal provided to a compensation scan line; a fifth transistor connected between the first node and a first initialization voltage line for providing a first initialization voltage, in which an operation of the fifth transistor is controlled by an initialization scan signal provided to an initialization scan line; a sixth transistor connected between the first electrode of the first transistor and a first driving voltage line for providing a first driving voltage, in which an operation of the sixth transistor is controlled by a light emitting control signal provided to a light emitting control line; a seventh transistor connected between the second electrode of the first transistor and the light emitting element, in which an operation of the seventh transistor is controlled by the light emitting control signal provided to the light emitting control line; and an eighth transistor connected between the light emitting element and a second initialization voltage line for providing a second initialization voltage, in which an operation of the eighth transistor is controlled by the bias scan signal provided to the bias scan line. ### Claim 14 (depends on 13) The display device of claim 13, wherein each of the first transistor, the second transistor, the third transistor, the sixth transistor, the seventh transistor, and the eighth transistor is a P-type thin film transistor having a silicon semiconductor layer, and wherein each of the fourth transistor and the fifth transistor is an N-type thin film transistors having an oxide semiconductor layer. ### Claim 15 A display device comprising: a display panel configured to operate at a variable frame frequency including a first frame frequency and a second frame frequency higher than the first frame frequency, and including a plurality of first pixels electrically connected to a first bias voltage line and a plurality of second pixels electrically connected to a second bias voltage line; and a voltage generator configured to provide a first bias voltage to the first bias voltage line and provide a second bias voltage to the second bias voltage line, wherein each of the plurality of first pixels and second pixels includes: a first transistor including a gate electrode connected to a first node, a first electrode, and a second electrode connected to a second node; a second transistor connected between a data line and the first electrode of the first transistor, in which an operation of the second transistor is controlled by a write scan signal provided to a write scan line; and a third transistor connected between the first electrode of the first transistor and the first or second bias voltage line, in which an operation of the third transistor is controlled by a bias scan signal provided to a bias scan line connected to a gate electrode of the third transistor, and wherein the write scan signal is activated to be in an active level by X times, the bias scan signal is activated to be in an active level by Y times greater than the X times, X is a positive integer equal to or greater than 1, and Y is a positive integer equal to or greater than 2. ### Claim 16 (depends on 15) The display device of claim 15, wherein one frame includes an active period, in which a data voltage is provided to each of the first pixel and the second pixel, and a plurality of blank periods provided consecutively to the active period, when the display panel operates at the first frame frequency, wherein a time point, at which a level of the first bias voltage is changed, is overlapped with the active period, and wherein a time point, at which a level of the second bias voltage is changed, is overlapped with a boundary between the active period and the plurality of blank periods. ### Claim 17 (depends on 15) The display device of claim 15, wherein a phase of the first bias voltage differs from a phase of the second bias voltage. ### Claim 18 (depends on 15) The display device of claim 15, wherein the first bias voltage and the second bias voltage are changed from a first level to a second level different from the first level, at a time point, at which the level of the first bias voltage is changed, and a time point at which the level of the second bias voltage is changed, respectively. ### Claim 19 (depends on 18) The display device of claim 18, wherein a period, in which the first bias voltage has the first level, is temporally in a non-overlap state with a period in which the second bias voltage has the first level. ### Claim 20 (depends on 15) The display device of claim 15, wherein each of the plurality of first pixels and second pixels further includes a light emitting element and a pixel circuit connected to the light emitting element and including the first to third transistors, wherein the pixel circuit further includes: a fourth transistor connected between the first node and the second node in which an operation of the fourth transistor is controlled by a compensation scan signal provided to a compensation scan line; a fifth transistor connected between the first node and a first initialization voltage line for providing a first initialization voltage, in which an operation of the fifth transistor is controlled by an initialization scan signal provided to an initialization scan line; a sixth transistor connected between the first electrode of the first transistor and a first driving voltage line for providing a first driving voltage, in which an operation of the sixth transistor is controlled by a light emitting control signal provided to a light emitting control line; a seventh transistor connected between the second electrode of the first transistor and the light emitting element, in which an operation of the seventh transistor is controlled by the light emitting control signal provided to the light emitting control line; and an eighth transistor connected between the light emitting element and a second initialization voltage line for providing a second initialization voltage, in which an operation of the eighth transistor is controlled by the bias scan signal provided to the bias scan line.