# US 12,217,654 B2 · Electroluminescence display apparatus reducing number of gate lines in double rate driving

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- Number: US 12,217,654 B2
- Document ID: US12217654B2
- Status: Granted
- Kind: B2
- Application number: 17/389,197
- Filed: 2021-07-29
- Published: 2022-02-03
- Granted: 2025-02-04
- Earliest claimed: 2020-07-30
- Assignees: LG Display Co., Ltd.
- Applicants: LG Display Co., Ltd.
- Inventors: In Su Hwang; Dong Ik Kim
- Web page: https://patentgrep.com/patent/US12217654B2

## CPC

- G09G 3/32: semiconductive, e.g. using light-emitting diodes [LED]
- G09G 3/3233: with pixel circuitry controlling the current through the light-emitting element
- G09G 2300/0439: Pixel structures
- G09G 2300/0452: Details of colour pixel setup, e.g. pixel composed of a red, a blue and two green components
- G09G 2300/0819: used for counteracting undesired variations, e.g. feedback or autozeroing
- G09G 2300/0842: forming a memory circuit, e.g. a dynamic memory with one capacitor
- G09G 2300/0852: being a dynamic memory with more than one capacitor
- G09G 2310/0267: Details of drivers for scan electrodes, other than drivers for liquid crystal, plasma or OLED displays
- G09G 2310/0275: Details of drivers for data electrodes, other than drivers for liquid crystal, plasma or OLED displays, not related to handling digital grey scale data or to communication of data to the pixels by means of a current
- G09G 2310/0297: Special arrangements with multiplexing or demultiplexing of display data in the drivers for data electrodes, in a pre-processing circuitry delivering display data to said drivers or in the matrix panel, e.g. multiplexing plural data signals to one D/A converter or demultiplexing the D/A converter output to multiple columns
- G09G 2310/08: Details of timing specific for flat panels, other than clock recovery
- G09G 2320/0223: Compensation for problems related to R-C delay and attenuation in electrodes of matrix panels, e.g. in gate electrodes or on-substrate video signal electrodes
- G09G 2320/0295: by monitoring each display pixel
- G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00)

## Abstract

An electroluminescence display apparatus includes a first pixel, a second pixel disposed adjacent to the first pixel in a horizontal direction to share a data line to which a first data voltage and a second data voltage are time-divisionally supplied and a reference voltage line to which a reference voltage is supplied, along with the first pixel, a first gate line coupled to the first pixel to transfer a first gate control signal, corresponding to the reference voltage, to the first pixel, a second gate line coupled to the first and second pixels in common to transfer a second gate control signal, corresponding to the first data voltage and the reference voltage in common, to the first and second pixels, and a third gate line coupled to the second pixel to transfer a third gate control signal, corresponding to the second data voltage, to the second pixel.

## Claims

### Claim 1

An electroluminescence display apparatus comprising:
a first pixel;
a second pixel disposed adjacent to the first pixel;
a shared data line electrically connected to both the first pixel and the second pixel, the shared data line configured to time-divisionally supply a first data voltage and a second data voltage;
a shared reference voltage line directly, electrically connected to both the first pixel and the second pixel, the shared reference voltage line configured to supply a reference voltage;
a first gate line electrically connected to the first pixel to transfer a first gate control signal;
a second gate line electrically connected to the first and second pixels in common to transfer a second gate control signal;
a third gate line electrically connected to the second pixel to transfer a third gate control signal; and
a gate driver electrically connected to the first, second, and third gate lines,
wherein each of the first and second gate lines has a first line width, and the third gate line has a second line width which differs from the first line width,
wherein the second gate line is commonly connected to a gate electrode of a first switching element in the first pixel and a gate electrode of a second switching element in the second pixel,
wherein the first switching element is electrically connected between a gate electrode of a first driving element of the first pixel and the shared data line,
wherein the second switching element is electrically connected between a source or a drain electrode of a second driving element of the second pixel and the shared reference voltage line,
wherein the gate driver is configured to:
generate the first gate control signal to supply the first gate control signal to the first gate line,
generate the second gate control signal to supply the second gate control signal to the second gate line, and
generate the third gate control signal to supply the third gate control signal to the third gate line,
wherein the shared data line supplies the first data voltage to the first pixel during a third period and supplies the second data voltage to the second pixel during a fourth period,
wherein a period when the third gate control signal has an on level overlaps with the third period and the fourth period, and
wherein a period when the first gate control signal has an on level does not overlap with the third period and the fourth period.

### Claim 2 (depends on 1)

The electroluminescence display apparatus of claim 1, wherein
the first pixel comprises a first light emitting device generating light of a first color, the first driving element driving the first light emitting device, a plurality of switching elements of a first group coupled to the first driving element, and a first storage capacitor, and
the second pixel comprises a second light emitting device generating light of a second color which differs from the first color, the second driving element driving the second light emitting device, a plurality of switching elements of a second group coupled to the second driving element, and a second storage capacitor.

### Claim 3 (depends on 2)

The electroluminescence display apparatus of claim 2, wherein
the plurality of switching elements of the first group comprises:
the first switching element; and
a third switching element operating based on the first gate control signal to connect a source of the first driving element to the shared reference voltage line, and
the plurality of switching elements of the second group comprises:
the second switching element; and
a fourth switching element operating based on the third gate control signal to connect a gate of the second driving element to the shared data line.

### Claim 4 (depends on 1)

The electroluminescence display apparatus of claim 1, wherein the second line width is wider than the first line width.

### Claim 5 (depends on 1)

The electroluminescence display apparatus of claim 1, wherein the third period and the fourth period is for one-horizontal period interval, respectively.

### Claim 6

An electroluminescence display apparatus comprising:
a first pixel;
a second pixel disposed adjacent to the first pixel in a horizontal direction to share a data line to which a first data voltage and a second data voltage are time-divisionally supplied and a reference voltage line to which a reference voltage is supplied, along with the first pixel;
a first gate line coupled to the first pixel to transfer a first gate control signal, corresponding to the reference voltage, to the first pixel;
a second gate line coupled to the first and second pixels in common to transfer a second gate control signal, corresponding to the first data voltage and the reference voltage in common, to the first and second pixels;
a third gate line coupled to the second pixel to transfer a third gate control signal, corresponding to the second data voltage, to the second pixel;
a gate driver coupled to the first to third gate lines; and
a data driver coupled to the data line,
wherein each of the first and second gate lines has a first line width, and the third gate line has a second line width which differs from the first line width,
wherein
the gate driver generates the first gate control signal to supply the first gate control signal to the first gate line, generates the second gate control signal to supply the second gate control signal to the second gate line, and generates the third gate control signal to supply the third gate control signal to the third gate line, and
the data driver synchronizes the reference voltage, which is to be supplied to the first pixel, with the first gate control signal having an on level to supply the reference voltage to the reference voltage line, partially synchronizes the first data voltage, which is to be supplied to the first pixel, with the second gate control signal having an on level to supply the first data voltage to the data line, synchronizes the reference voltage, which is to be supplied to the second pixel, with the second gate control signal having an on level to supply the reference voltage to the reference voltage line, and partially synchronizes the second data voltage, which is to be supplied to the second pixel, with the third gate control signal having an on level to supply the second data voltage to the data line.

### Claim 7

An electroluminescence display apparatus comprising:
a first pixel;
a second pixel disposed adjacent to the first pixel in a horizontal direction to share a data line to which a first data voltage and a second data voltage are time-divisionally supplied and a reference voltage line to which a reference voltage is supplied, along with the first pixel;
a first gate line coupled to the first pixel to transfer a first gate control signal, corresponding to the reference voltage, to the first pixel;
a second gate line coupled to the first and second pixels in common to transfer a second gate control signal, corresponding to the first data voltage and the reference voltage in common, to the first and second pixels; and
a third gate line coupled to the second pixel to transfer a third gate control signal, corresponding to the second data voltage, to the second pixel,
wherein each of the first and second gate lines has a first line width, and the third gate line has a second line width which differs from the first line width, and
wherein, in a first period, a second period, a third period, and a fourth period sequentially arranged at a certain time interval, the first to third gate control signals have identical pulse width and have phases which are sequentially delayed, and on level periods of two adjacent gate control signals overlap by half each.

### Claim 8 (depends on 7)

The electroluminescence display apparatus of claim 7, wherein
the first gate control signal has an on level in only the first and second periods,
the second gate control signal has an on level in only the second and third periods, and
the third gate control signal has an on level in only the third and fourth periods.