# US 12,216,933 B1 · Memory management method, memory storage device, and memory control circuit unit > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,216,933 B1 - Document ID: US12216933B1 - Status: Granted - Kind: B1 - Application number: 18/469,561 - Filed: 2023-09-19 - Published: 2025-01-30 - Granted: 2025-02-04 - Earliest claimed: 2023-07-26 - Assignees: Phison Electronics Corp. - Applicants: Phison Electronics Corp. - Inventors: Kok-Yong Tan - Web page: https://patentgrep.com/patent/US12216933B1 ## CPC - G06F 3/0656: {Data buffering arrangements} - G06F 3/0604: {Improving or facilitating administration, e.g. storage management} - G06F 3/0625: {Power saving in storage systems} - G06F 3/0634: {by changing the state or mode of one or more devices} - G06F 3/0653: {Monitoring storage devices or systems} - G06F 3/0679: {Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]} - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract A memory management method, a memory storage device, and a memory control circuit unit are provided. The method includes establishing a connection between the memory storage device and a host system; receiving a first request from the host system via the connection; detecting a status of the memory storage device in a time range according to the first request; and determining whether to use a memory in the host system according to the status. ## Claims ### Claim 1 A memory management method for a memory storage device, the memory management method comprising: establishing a connection between the memory storage device and a host system; receiving a first request from the host system via the connection; detecting a status of the memory storage device within a time range according to the first request; and determining whether to use a memory in the host system according to the status. ### Claim 2 (depends on 1) The memory management method according to claim 1, wherein the first request is used to enable host system buffering. ### Claim 3 (depends on 1) The memory management method according to claim 1, wherein the step of detecting the status of the memory storage device within the time range comprises: obtaining the status of the memory storage device within the time range according to at least one of a received command record and a system environment record of the memory storage device. ### Claim 4 (depends on 1) The memory management method according to claim 1, wherein the step of determining whether to use the memory in the host system according to the status comprises: not using the memory in the host system in response to a specified status of the memory storage device occurring within the time range; and allowing the memory in the host system to be used after leaving the time range in response to the specified status of the memory storage device not occurring within the time range. ### Claim 5 (depends on 4) The memory management method according to claim 4, wherein the specific status comprises at least one of a plurality of statuses of: the memory storage device being reset; a voltage deviation of the memory storage device exceeding an allowable range; the memory storage device receiving a second request from the host system, wherein the second request is used to disable host system buffering; and the memory storage device receiving a third request from the host system, wherein the third request is used to instruct the memory storage device to enter a low power consumption mode. ### Claim 6 A memory storage device, comprising: a connection interface unit, used to couple to a host system; a rewritable non-volatile memory module; and a memory control circuit unit, coupled to the connection interface unit and the rewritable non-volatile memory module, wherein the memory control circuit unit is used to: establish a connection between the memory storage device and the host system; receive a first request from the host system via the connection; detect a status of the memory storage device within a time range according to the first request; and determine whether to use a memory in the host system according to the status. ### Claim 7 (depends on 6) The memory storage device according to claim 6, wherein the first request is used to enable host system buffering. ### Claim 8 (depends on 6) The memory storage device according to claim 6, wherein the operation of the memory control circuit unit detecting the status of the memory storage device within the time range comprises: obtaining the status of the memory storage device within the time range according to at least one of a received command record and a system environment record of the memory storage device. ### Claim 9 (depends on 6) The memory storage device according to claim 6, wherein the operation of the memory control circuit unit determining whether to use the memory in the host system according to the status comprises: not using the memory in the host system in response to a specified status of the memory storage device occurring within the time range; and allowing the memory in the host system to be used after leaving the time range in response to the specified status of the memory storage device not occurring within the time range. ### Claim 10 (depends on 9) The memory storage device according to claim 9, wherein the specific status comprises at least one of a plurality of statuses of: the memory storage device being reset; a voltage deviation of the memory storage device exceeding an allowable range; the memory storage device receiving a second request from the host system, wherein the second request is used to disable host system buffering; and the memory storage device receiving a third request from the host system, wherein the third request is used to instruct the memory storage device to enter a low power consumption mode. ### Claim 11 A memory control circuit unit for controlling a memory storage device, wherein the memory storage device comprises a rewritable non-volatile memory module, the memory control circuit unit comprising: a host interface, used to couple to a host system; a memory interface, used to couple to the rewritable non-volatile memory module; and a memory management circuit, coupled to the host interface and the memory interface, wherein the memory management circuit is used to: establish a connection between the memory storage device and the host system; receive a first request from the host system via the connection; detect a status of the memory storage device within a time range according to the first request; and determine whether to use a memory in the host system according to the status. ### Claim 12 (depends on 11) The memory control circuit unit according to claim 11, wherein the first request is used to enable host system buffering. ### Claim 13 (depends on 11) The memory control circuit unit according to claim 11, wherein the operation of the memory management circuit detecting the status of the memory storage device within the time range comprises: obtaining the status of the memory storage device within the time range according to at least one of a received command record and a system environment record of the memory storage device. ### Claim 14 (depends on 11) The memory control circuit unit according to claim 11, wherein the operation of the memory management circuit determining whether to use the memory in the host system according to the status comprises: not using the memory in the host system in response to a specified status of the memory storage device occurring within the time range; and allowing the memory in the host system to be used after leaving the time range in response to the specified status of the memory storage device not occurring within the time range. ### Claim 15 (depends on 14) The memory control circuit unit according to claim 14, wherein the specific status comprises at least one of a plurality of statuses of: the memory storage device being reset; a voltage deviation of the memory storage device exceeding an allowable range; the memory storage device receiving a second request from the host system, wherein the second request is used to disable host system buffering; and the memory storage device receiving a third request from the host system, wherein the third request is used to instruct the memory storage device to enter a low power consumption mode. ### Claim 16 A memory management method for a memory storage device, the memory management method comprising: establishing a connection between the memory storage device and a host system; receiving a first request from the host system via the connection; detecting a status of the memory storage device within a time range according to the first request; and determining whether to enable the memory storage device to enter a low power consumption mode according to the status. ### Claim 17 (depends on 16) The memory management method according to claim 16, wherein the first request is used to instruct the memory storage device to enter the low power consumption mode. ### Claim 18 (depends on 16) The memory management method according to claim 16, wherein the step of detecting the status of the memory storage device within the time range comprises: obtaining the status of the memory storage device within the time range according to a received command record of the memory storage device. ### Claim 19 (depends on 16) The memory management method according to claim 16, wherein the step of determining whether to enable the memory storage device to enter the low power consumption mode according to the status comprises: not enabling the memory storage device to enter the low power consumption mode in response to the memory storage device receiving a second request within the time range, wherein the second request is used to wake up the memory storage device; and controlling the memory storage device to enter the low power consumption mode after leaving the time range in response to the memory storage device not receiving the second request within the time range. ### Claim 20 A memory storage device, comprising: a connection interface unit, used to couple to a host system; a rewritable non-volatile memory module; and a memory control circuit unit, coupled to the connection interface unit and the rewritable non-volatile memory module, wherein the memory control circuit unit is used to: establish a connection between the memory storage device and the host system; receive a first request from the host system via the connection; detect a status of the memory storage device within a time range according to the first request; and determine whether to enable the memory storage device to enter a low power consumption mode according to the status. ### Claim 21 (depends on 20) The memory storage device according to claim 20, wherein the first request is used to instruct the memory storage device to enter the low power consumption mode. ### Claim 22 (depends on 20) The memory storage device according to claim 20, wherein the operation of the memory control circuit unit detecting the status of the memory storage device within the time range comprises: obtaining the status of the memory storage device within the time range according to a received command record of the memory storage device. ### Claim 23 (depends on 20) The memory storage device according to claim 20, wherein the operation of the memory control circuit unit determining whether to enable the memory storage device to enter the low power consumption mode according to the status comprises: not enabling the memory storage device to enter the low power consumption mode in response to the memory storage device receiving a second request within the time range, wherein the second request is used to wake up the memory storage device; and controlling the memory storage device to enter the low power consumption mode after leaving the time range in response to the memory storage device not receiving the second request within the time range. ### Claim 24 A memory control circuit unit for controlling a memory storage device, wherein the memory storage device comprises a rewritable non-volatile memory module, the memory control circuit unit comprising: a host interface, used to couple to a host system; a memory interface, used to couple to the rewritable non-volatile memory module; and a memory management circuit, coupled to the host interface and the memory interface, wherein the memory management circuit is used to: establish a connection between the memory storage device and the host system; receive a first request from the host system via the connection; detect a status of the memory storage device within a time range according to the first request; and determine whether to enable the memory storage device to enter a low power consumption mode according to the status. ### Claim 25 (depends on 24) The memory control circuit unit according to claim 24, wherein the first request is used to instruct the memory storage device to enter the low power consumption mode. ### Claim 26 (depends on 24) The memory control circuit unit according to claim 24, wherein the operation of the memory management circuit detecting the status of the memory storage device within the time range comprises: obtaining the status of the memory storage device within the time range according to a received command record of the memory storage device. ### Claim 27 (depends on 24) The memory control circuit unit according to claim 24, wherein the operation of the memory management circuit determining whether to enable the memory storage device to enter the low power consumption mode according to the status comprises: not enabling the memory storage device to enter the low power consumption mode in response to the memory storage device receiving a second request within the time range, wherein the second request is used to wake up the memory storage device; and controlling the memory storage device to enter the low power consumption mode after leaving the time range in response to the memory storage device not receiving the second request within the time range. ### Claim 28 A memory storage device, comprising: a connection interface unit, used to couple to a host system; a rewritable non-volatile memory module; and a memory control circuit unit, coupled to the connection interface unit and the rewritable non-volatile memory module, wherein the memory control circuit unit is used to: establish a connection between the memory storage device and the host system; receive a first request from the host system via the connection; detect whether at least one event occurs within a time range according to the first request, wherein the at least one event affects an execution effect of an operation instructed by the first request; and determine whether to execute the operation according to a detection result.