# US 12,216,913 B2 · System and method of providing atomicity to large writes to persistent memory > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,216,913 B2 - Document ID: US12216913B2 - Status: Granted - Kind: B2 - Application number: 17/888,426 - Filed: 2022-08-15 - Published: 2022-12-08 - Granted: 2025-02-04 - Earliest claimed: 2020-01-10 - Assignees: Samsung Electronics Co., Ltd. - Applicants: Samsung Electronics Co., Ltd. - Inventors: Angel Benedicto Aviles, Jr.; Vinod Kumar Daga; Vamsikrishna Sadhu; Tejas Hunsur Krishna - Web page: https://patentgrep.com/patent/US12216913B2 ## CPC - G06F 3/0619: {in relation to data integrity, e.g. data losses, bit errors} - G06F 3/0631: {by allocating resources to storage systems} - G06F 3/0656: {Data buffering arrangements} - G06F 3/0685: {Hybrid storage combining heterogeneous device types, e.g. hierarchical storage, hybrid arrays} - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract A system and a method are disclosed that provides atomicity for large data writes to persistent memory of an object storage system. A segment of persistent memory is allocated to an application. The persistent memory includes non-volatile memory that is accessible in a random access, byte-addressable manner. The segment of persistent memory is associated with first and second bits of a bitmap. The first bit is set indicating that the segment of persistent memory has been allocated. Data is received from the application for storage in the segment of persistent memory, and the second bit is set indicating that data in the segment of persistent memory has been finalized and is ready for storage in a storage medium that is different from persistent memory. The atomicity of the data in persistent memory may be determined based on the first bit and the second bit being set. ## Claims ### Claim 1 A storage system, comprising: a storage medium; memory comprising non-volatile memory that is accessible in a random access, byte-addressable manner; and a controller coupled to the storage medium and the memory, the controller being configured to determine a modification of data of an application stored in a segment of the memory based on a first indication in the memory that the segment of the memory is allocated to the application and on a second indication in the memory that the data in the segment of the memory is for storage in the storage medium, wherein the first and second indications comprise bits associated with a cache line and a data structure. ### Claim 2 (depends on 1) The storage system of claim 1, wherein the controller is further configured to allocate the segment of the memory to the application in response to a request received from the application. ### Claim 3 (depends on 2) The storage system of claim 2, wherein the controller is further configured to store the data in the segment of the memory in the storage medium based on the second indication. ### Claim 4 (depends on 3) The storage system of claim 3, wherein the memory further comprises multiple segments, a size of a first segment of the multiple segments having a same size as a second segment of the multiple segments, and wherein the first segment is associated with a corresponding first indication and a corresponding second indication. ### Claim 5 (depends on 4) The storage system of claim 4, wherein the first indication and the second indication comprise metadata associated with data of the application stored in the first segment. ### Claim 6 (depends on 1) The storage system of claim 1, wherein the memory further comprises random access memory having a power supply with battery backup, a non-volatile dual inline memory (NVDIMM) or a storage class memory (SCM). ### Claim 7 (depends on 1) The storage system of claim 1, wherein the storage medium comprises a solid-state drive (SSD) or a hard drive (HD). ### Claim 8 A storage system, comprising: a storage medium; memory comprising non-volatile memory that is accessible in a random access, byte-addressable manner; and a controller coupled to the storage medium and the memory, the controller being configured to: allocate a segment of the memory to an application, the segment of the memory being associated with a first indication in the memory and a second indication in the memory, and determine a modification of data of the application stored in the memory based on the first indication in the memory that a segment of memory is allocated to the application and on the second indication in the memory that the data in the segment of memory is for storage in the storage medium, wherein the first and second indications comprise bits associated with a cache line and a data structure. ### Claim 9 (depends on 8) The storage system of claim 8, wherein the controller is further configured to store the data in the segment of the memory in the storage medium based on the second indication. ### Claim 10 (depends on 8) The storage system of claim 8, wherein the memory further comprises multiple segments in which a size of a first segment comprises a same size as a second segment, and wherein the first segment is associated with a corresponding first indication and a corresponding second indication. ### Claim 11 (depends on 10) The storage system of claim 10, wherein the first indication and the second indication comprise metadata associated with data of the application stored in the first segment. ### Claim 12 (depends on 8) The storage system of claim 8, wherein the memory further comprises random access memory having a power supply with battery backup. ### Claim 13 (depends on 8) The storage system of claim 8, wherein the memory comprises a non-volatile dual inline memory (NVDIMM) or a storage class memory (SCM). ### Claim 14 (depends on 8) The storage system of claim 8, wherein the storage medium comprises a solid-state drive (SSD) or a hard drive (HD). ### Claim 15 A method to provide atomicity for data writes to a storage system, the method comprising: allocating a segment of a memory to an application, the memory comprising non-volatile memory that is accessible in a random access, byte-addressable manner, and the segment of the memory being associated with a first indication in the memory and a second indication in the memory; and determining a modification of data of the application stored in the memory based on the first indication in the memory that a segment of memory is allocated to the application and on the second indication in the memory that the data in the segment of memory is ready for storage in a storage medium that is different from the memory, wherein the first and second indications comprise bits associated with a cache line and a data structure. ### Claim 16 (depends on 15) The method of claim 15, further comprising storing the data in the segment of the memory in the storage medium based on the second indication. ### Claim 17 (depends on 15) The method of claim 15, wherein the memory further comprises multiple segments in which a first segment comprises a same size as a second segment, and wherein the first segment is associated with a corresponding first indication and a corresponding second indication. ### Claim 18 (depends on 17) The method of claim 17, wherein the first indication and the second indication comprise metadata associated with data of the application stored in the first segment. ### Claim 19 (depends on 15) The method of claim 15, wherein the memory further comprises random access memory having a power supply with battery backup, a non-volatile dual inline memory (NVDIMM) or a storage class memory (SCM). ### Claim 20 (depends on 15) The method of claim 15, wherein the storage medium comprises a solid-state drive (SSD) or a hard drive (HD).