# US 12,216,734 B2 · Apparatus and method for conjugate transpose and multiply > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,216,734 B2 - Document ID: US12216734B2 - Status: Granted - Kind: B2 - Application number: 17/133,456 - Filed: 2020-12-23 - Published: 2022-06-23 - Granted: 2025-02-04 - Earliest claimed: 2020-12-23 - Assignees: Intel Corporation - Applicants: Intel Corporation - Inventors: Menachem Adelman; Robert Valentine; Daniel Towner; Amit Gradstein; Mark Jay Charney - Web page: https://patentgrep.com/patent/US12216734B2 ## CPC - G06F 9/30014: {with variable precision} - G06F 17/16: Matrix or vector computation {, e.g. matrix-matrix or matrix-vector multiplication, matrix factorization (matrix transposition G06F7/78)} - G06F 7/523: Multiplying only - G06F 7/78: for changing the order of data flow, e.g. matrix transposition or LIFO buffers; Overflow or underflow handling therefor - G06F 9/3001: {Arithmetic instructions} - G06F 9/30032: {Movement instructions, e.g. MOVE, SHIFT, ROTATE, SHUFFLE} - G06F 9/30036: {Instructions to perform operations on packed data, e.g. vector, tile or matrix operations} - G06F 9/30038: {using a mask} - G06F 9/30145: {Instruction analysis, e.g. decoding, instruction word fields} - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract An apparatus and method for complex matrix conjugation and multiplication. For example, one embodiment of a processor comprises: a decoder to decode a complex matrix conjugation and multiplication instruction including a first source operand to identify a first complex source matrix comprising a first plurality of complex values, a second source operand to identify a second complex source matrix comprising a second plurality of complex values, and a first destination operand to identify a result matrix; execution circuitry to execute the complex matrix conjugation and multiplication instruction, the execution circuitry comprising: matrix conjugation hardware logic to determine a plurality of complex conjugate values corresponding to the first plurality of complex values; transpose hardware logic to transpose the plurality of complex conjugate values to generate a conjugate transpose matrix comprising the complex conjugate values; parallel multiplication circuitry to: multiply real values from the plurality of complex conjugate values of the conjugate transpose matrix with corresponding imaginary values from the second plurality of complex values to generate a first plurality of imaginary products, and multiply imaginary values from the plurality of complex conjugate values of the conjugate transpose matrix with corresponding real values from the second plurality of complex values to generate a second plurality of imaginary products; and addition/subtraction circuitry to add each imaginary product in the first plurality of imaginary products to a corresponding imaginary product in the second plurality of imaginary products to produce a corresponding imaginary component in the result matrix. ## Claims ### Claim 1 A processor comprising: a decoder to decode a single complex matrix conjugation and multiplication instruction including a first source operand to identify a first complex source matrix comprising a first plurality of complex values including a corresponding first plurality of real values and a corresponding first plurality of imaginary values, a second source operand to identify a second complex source matrix comprising a second plurality of complex values including a corresponding second plurality of real values and a corresponding second plurality of imaginary values, a first destination operand to identify an imaginary result matrix, and an opcode to indicate a combined complex matrix conjugation and multiplication operation using the first plurality of complex values and the second plurality of complex values to generate the imaginary result matrix; execution circuitry to execute the single complex matrix conjugation and multiplication instruction, the execution circuitry comprising: matrix conjugation hardware logic comprising inversion circuitry to determine a plurality of complex conjugate values corresponding to the first plurality of complex values by inverting sign values of the corresponding first plurality of imaginary values to generate a corresponding plurality of sign-inverted imaginary values; transpose hardware logic to transpose the plurality of complex conjugate values to generate a conjugate transpose matrix comprising the plurality of complex conjugate values including the corresponding plurality of sign-inverted imaginary values; parallel multiplication circuitry to: multiply real values from the plurality of complex conjugate values of the conjugate transpose matrix with corresponding imaginary values from the second plurality of complex values to generate a first plurality of imaginary products, and multiply the sign-inverted imaginary values from the plurality of complex conjugate values of the conjugate transpose matrix with corresponding real values from the second plurality of complex values to generate a second plurality of imaginary products; and addition/subtraction circuitry to add each imaginary product in the first plurality of imaginary products to a corresponding imaginary product in the second plurality of imaginary products to produce a corresponding imaginary value of the imaginary result matrix. ### Claim 2 (depends on 1) The processor of claim 1 wherein each of the plurality of complex conjugate values comprise a real value and a corresponding sign-inverted imaginary value of the plurality of sign-inverted imaginary values. ### Claim 3 (depends on 2) The processor of claim 2, wherein the complex values in the first plurality of complex values and the second plurality of complex values comprise 32-bit floating-point values, each with a 16-bit real component and a 16-bit imaginary component. ### Claim 4 (depends on 3) The processor of claim 3, wherein the first complex source matrix comprises an k×m matrix with k rows and m columns of complex data elements, the conjugate transpose matrix comprises a m×k matrix with m rows and k columns of complex data elements, and the second complex source matrix comprises a k×n matrix with k rows and n columns of complex data elements. ### Claim 5 (depends on 4) The processor of claim 4 wherein the parallel multiplication circuitry comprises a plurality of multipliers to perform a first plurality of parallel multiplications of at least a portion of the real values and sign-inverted imaginary values in the conjugate transpose matrix with the corresponding imaginary and real values, respectively, in the second complex source matrix to generate the first and second plurality of imaginary products. ### Claim 6 (depends on 2) The processor of claim 2, wherein transposing the plurality of complex conjugate values comprises switching indices of the rows and columns of the first complex source matrix. ### Claim 7 A processor comprising: a decoder to decode a single complex matrix conjugation and multiplication instruction including a first source operand to identify a first complex source matrix comprising a first plurality of complex values including a corresponding first plurality of real values and a corresponding first plurality of imaginary values, a second source operand to identify a second complex source matrix comprising a second plurality of complex values including a corresponding second plurality of real values and a corresponding second plurality of imaginary values, a first destination operand to identify an imaginary result matrix, and an opcode to indicate a combined complex matrix conjugation and multiplication operation using the first plurality of complex values and the second plurality of complex values to generate the imaginary result matrix; execution circuitry to execute the single complex matrix conjugation and multiplication instruction, the execution circuitry comprising: transpose hardware logic to transpose the first complex source matrix to generate a transposed complex source matrix comprising the first plurality of complex values; matrix conjugation hardware logic comprising inversion circuitry to determine a plurality of complex conjugate values corresponding to the first plurality of complex values in the transposed complex source matrix by inverting sign values of the corresponding first plurality of imaginary values to generate a corresponding plurality of sign-inverted imaginary values to generate a conjugate transpose matrix; parallel multiplication circuitry to: multiply real values from the plurality of complex conjugate values of the conjugate transpose matrix with corresponding imaginary values from the second plurality of complex values to generate a first plurality of imaginary products, and multiply the sign-inverted imaginary values from the plurality of complex conjugate values of the conjugate transpose matrix with corresponding real values from the second plurality of complex values to generate a second plurality of imaginary products; and addition/subtraction circuitry to add each imaginary product in the first plurality of imaginary products to a corresponding imaginary product in the second plurality of imaginary products to produce a corresponding imaginary value of the imaginary result matrix. ### Claim 8 A method comprising: decoding by a decoder, a single complex matrix conjugation and multiplication instruction including a first source operand to identify a first complex source matrix comprising a first plurality of complex values including a corresponding first plurality of real values and a corresponding first plurality of imaginary values, a second source operand to identify a second complex source matrix comprising a second plurality of complex values including a corresponding second plurality of real values and a corresponding second plurality of imaginary values, a first destination operand to identify an imaginary result matrix, and an opcode to indicate a combined complex matrix conjugation and multiplication operation using the first plurality of complex values and the second plurality of complex values to generate the imaginary result matrix; executing, by execution circuitry, the single complex matrix conjugation and multiplication instruction with execution circuitry, to perform the operations: determining, by matrix conjugation hardware logic of the execution circuitry, a plurality of complex conjugate values corresponding to the first plurality of complex values, the matrix conjugation hardware logic including inversion circuitry to determine a plurality of complex conjugate values corresponding to the first plurality of complex values by inverting sign values of the corresponding first plurality of imaginary values to generate a corresponding plurality of sign-inverted imaginary values; transposing, by transpose hardware logic of the execution circuitry, the plurality of complex conjugate values to generate a conjugate transpose matrix comprising the plurality of complex conjugate values including the corresponding plurality of sign-inverted imaginary values; multiplying, by parallel multiplication circuitry of the execution circuitry, real values from the plurality of complex conjugate values of the conjugate transpose matrix with corresponding imaginary values from the second plurality of complex values to generate a first plurality of imaginary products, and multiplying, by the parallel multiplication circuitry of the execution circuitry, the sign-inverted imaginary values from the plurality of complex conjugate values of the conjugate transpose matrix with corresponding real values from the second plurality of complex values to generate a second plurality of imaginary products; and adding each imaginary product in the first plurality of imaginary products to a corresponding imaginary product in the second plurality of imaginary products to produce a corresponding imaginary value of the imaginary result matrix. ### Claim 9 (depends on 8) The method of claim 8, wherein each of the plurality of complex conjugate values comprise a real value and a corresponding sign-inverted imaginary value of the plurality of sign-inverted imaginary values. ### Claim 10 (depends on 9) The method of claim 9, wherein the complex values in the first plurality of complex values and the second plurality of complex values comprise 32-bit floating-point values, each with a 16-bit real component and a 16-bit imaginary component. ### Claim 11 (depends on 10) The method of claim 10, wherein the first complex source matrix comprises an k×m matrix with k rows and m columns of complex data elements, the conjugate transpose matrix comprises a m×k matrix with m rows and k columns of complex data elements, and the second complex source matrix comprises a k×n matrix with k rows and n columns of complex data elements. ### Claim 12 (depends on 11) The method of claim 11, wherein the parallel multiplication circuitry comprises a plurality of multipliers to perform a first plurality of parallel multiplications of at least a portion of the real values and sign-inverted imaginary values in the conjugate transpose matrix with the corresponding imaginary and real values, respectively, in the second complex source matrix to generate the first and second plurality of imaginary products. ### Claim 13 (depends on 9) The method of claim 9, wherein transposing the plurality of complex conjugate values comprises switching indices of the rows and columns of the first complex source matrix. ### Claim 14 A non-transitory machine-readable medium having program code stored thereon which, when executed by a machine, causes the machine to perform the operations of: decoding by a decoder, a single complex matrix conjugation and multiplication instruction including a first source operand to identify a first complex source matrix comprising a first plurality of complex values including a corresponding first plurality of real values and a corresponding first plurality of imaginary values, a second source operand to identify a second complex source matrix comprising a second plurality of complex values including a corresponding second plurality of real values and a corresponding second plurality of imaginary values, a first destination operand to identify an imaginary result matrix, and an opcode to indicate a combined complex matrix conjugation and multiplication operation using the first plurality of complex values and the second plurality of complex values to generate the imaginary result matrix; executing, by execution circuitry, the single complex matrix conjugation and multiplication instruction to perform the operations: determining, by matrix conjugation hardware logic of the execution circuitry, a plurality of complex conjugate values corresponding to the first plurality of complex values, the matrix conjugation hardware logic including inversion circuitry to determine a plurality of complex conjugate values corresponding to the first plurality of complex values by inverting sign values of the corresponding first plurality of imaginary values to generate a corresponding plurality of sign-inverted imaginary values; transposing, by transpose hardware logic of the execution circuitry, the plurality of complex conjugate values to generate a conjugate transpose matrix comprising the plurality of complex conjugate values including the corresponding plurality of sign-inverted imaginary values; multiplying, by parallel multiplication circuitry of the execution circuitry, real values from the plurality of complex conjugate values of the conjugate transpose matrix with corresponding imaginary values from the second plurality of complex values to generate a first plurality of imaginary products, and multiplying, by the parallel multiplication circuitry of the execution circuitry, the sign-inverted imaginary values from the plurality of complex conjugate values of the conjugate transpose matrix with corresponding real values from the second plurality of complex values to generate a second plurality of imaginary products; and adding each imaginary product in the first plurality of imaginary products to a corresponding imaginary product in the second plurality of imaginary products to produce a corresponding imaginary value of the imaginary result matrix. ### Claim 15 (depends on 14) The non-transitory machine-readable medium of claim 14, wherein each of the plurality of complex conjugate values comprise a real value and a corresponding sign-inverted imaginary value of the plurality of sign-inverted imaginary values. ### Claim 16 (depends on 15) The non-transitory machine-readable medium of claim 15, wherein the complex values in the first plurality of complex values and the second plurality of complex values comprise 32-bit floating-point values, each with a 16-bit real component and a 16-bit imaginary component. ### Claim 17 (depends on 16) The non-transitory machine-readable medium of claim 16, wherein the first complex source matrix comprises an k×m matrix with k rows and m columns of complex data elements, the conjugate transpose matrix comprises a m×k matrix with m rows and k columns of complex data elements, and the second complex source matrix comprises a k×n matrix with k rows and n columns of complex data elements. ### Claim 18 (depends on 17) The non-transitory machine-readable medium of claim 17, wherein the parallel multiplication circuitry comprises a plurality of multipliers to perform a first plurality of parallel multiplications of at least a portion of the real values and sign-inverted imaginary values in the conjugate transpose matrix with the corresponding imaginary and real values, respectively, in the second complex source matrix to generate the first and second plurality of imaginary products. ### Claim 19 (depends on 15) The non-transitory machine-readable medium of claim 15, wherein transposing the plurality of complex conjugate values comprises switching indices of the rows and columns of the first complex source matrix.