# US 12,216,600 B2 · Neural network processing system for data moving method using direct memory access apparatus > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,216,600 B2 - Document ID: US12216600B2 - Status: Granted - Kind: B2 - Application number: 18/089,748 - Filed: 2022-12-28 - Published: 2023-07-06 - Granted: 2025-02-04 - Earliest claimed: 2021-12-30 - Assignees: Beijing ESWIN Computing Technology Co., Ltd. - Applicants: Beijing ESWIN Computing Technology Co., Ltd. - Inventors: Shilin Luo - Web page: https://patentgrep.com/patent/US12216600B2 ## CPC - G06F 13/28: using burst mode transfer, e.g. direct memory access {DMA}, cycle steal (G06F13/32 takes precedence) - G06F 12/0835: {for main memory peripheral accesses (e.g. I/O or DMA)} - G06N 3/063: using electronic means - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) - G06N: COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS ## Abstract A data moving method for a direct memory access apparatus is disclosed, and the data moving method for the direct memory access apparatus includes: receiving, by the direct memory access apparatus, an object data moving instruction and decoding the object data moving instruction, wherein the object data moving instruction includes a first field, and the first field of the object data moving instruction indicates a data moving operation for a neural-network processor; and executing, by the direct memory access apparatus, the object data moving instruction. ## Claims ### Claim 1 A data moving method for a direct memory access apparatus, comprising: receiving, by the direct memory access apparatus, an object data moving instruction and decoding the object data moving instruction, wherein the object data moving instruction comprises a first field, and the first field of the object data moving instruction indicates a data moving operation for a neural-network processor; and executing, by the direct memory access apparatus, the object data moving instruction, wherein the object data moving instruction comprises a first data moving instruction, the first data moving instruction comprises a second field, and the second field of the first data moving instruction indicates data moving address information, and wherein the neural-network processor comprises at least one processing unit array, and the data moving address information is obtained based on a mapping relationship between data to be moved and at least one processing unit in the processing unit array. ### Claim 2 (depends on 1) The data moving method according to claim 1, wherein executing, by the direct memory access apparatus, the object data moving instruction, comprises: obtaining, by the direct memory access apparatus, a data moving request, according to the data moving operation and the data moving address information, and executing the data moving operation for the neural-network processor according to the data moving request. ### Claim 3 (depends on 2) The data moving method according to claim 2, wherein the direct memory access apparatus comprises an instruction virtual channel storage circuit and an interface control circuit, the instruction virtual channel storage circuit is configured to store the first data moving instruction, and the interface control circuit is configured to convert the data moving instruction into the data moving request; and the data moving method, comprises: fetching the first data moving instruction from the instruction virtual channel storage circuit; converting, by the interface control circuit, the first data moving instruction fetched into the data moving request, according to the data moving operation and the data moving address information; and executing the data moving operation for the neural-network processor according to the data moving request. ### Claim 4 (depends on 2) The data moving method according to claim 2, wherein the data to be moved is obtained by cutting original data according to a first operation relationship, and the mapping relationship between the data to be moved and at least one processing unit in the processing unit array is determined by the first operation relationship. ### Claim 5 (depends on 2) The data moving method according to claim 2, wherein the data moving address information comprises offset address information and length information of the data to be moved. ### Claim 6 (depends on 1) The data moving method according to claim 1, wherein the object data moving instruction comprises a second data moving instruction, the second data moving instruction comprises a second field, the second field of the second data moving instruction indicates status information of cutting of original data, and data to be moved is obtained by cutting the original data according to a first operation relationship; and executing, by the direct memory access apparatus, the object data moving instruction, comprises: moving, by the direct memory access apparatus, the second data moving instruction to the neural-network processor. ### Claim 7 (depends on 1) The data moving method according to claim 1, wherein the object data moving instruction comprises a second data moving instruction, the second data moving instruction comprises a second field, and the second field of the second data moving instruction indicates control information for performing a padding operation on data to be moved; and executing, by the direct memory access apparatus, the object data moving instruction, comprises: moving, by the direct memory access apparatus, the second data moving instruction to the neural-network processor. ### Claim 8 (depends on 1) The data moving method according to claim 1, wherein the object data moving instruction comprises a second data moving instruction, the second data moving instruction comprises a second field, and the second field of the second data moving instruction indicates status information that moving of all or part of data to be moved has been completed; and executing, by the direct memory access apparatus, the object data moving instruction, comprises: moving, by the direct memory access apparatus, the second data moving instruction to the neural-network processor. ### Claim 9 (depends on 1) The data moving method according to claim 1, wherein the first field of the object data moving instruction further indicates type information of data to be moved, and the type information comprises at least one selected from a group consisting of: uncompressed neuron data; uncompressed weight data; and compressed weight data. ### Claim 10 (depends on 1) The data moving method according to claim 1, wherein before the object data moving instruction enters the direct memory access apparatus, the object data moving instruction further comprises a second field indicating identification information of the direct memory access apparatus, and the data moving method further comprises: decoding the second field of the object data moving instruction, and storing the object data moving instruction into the direct memory access apparatus, according to the identification information decoded. ### Claim 11 (depends on 1) The data moving method according to claim 1, wherein the direct memory access apparatus comprises an instruction virtual channel storage circuit, the instruction virtual channel storage circuit comprises a plurality of storage regions corresponding to a plurality of channels, and the object data moving instruction further comprises a-fourth second field indicating identification information of a storage region of the plurality of storage regions before the object data moving instruction is stored in the instruction virtual channel storage circuit; and the data moving method further comprises: decoding the second field of the object data moving instruction, and storing the object data moving instruction into the storage region in the instruction virtual channel storage circuit, according to the identification information decoded. ### Claim 12 (depends on 1) The data moving method according to claim 1, wherein the object data moving instruction further comprises a second field indicating priority. ### Claim 13 (depends on 1) The data moving method according to claim 1, wherein the object data moving instruction is a register type instruction. ### Claim 14 (depends on 2) The data moving method according to claim 2, wherein the data moving request is a data request that conforms to an AXI bus protocol. ### Claim 15 (depends on 1) The data moving method according to claim 1, wherein the object data moving instruction is an instruction that conforms to a SCIE bus protocol interface. ### Claim 16 (depends on 3) The data moving method according to claim 3, wherein the neural-network processor comprises at least one processing unit array, and the data moving address information is obtained based on a mapping relationship between data to be moved and at least one processing unit in the processing unit array. ### Claim 17 A method for controlling a direct memory access apparatus to write an instruction, wherein the direct memory access apparatus is coupled to an interface decoder, a first field of a first data moving instruction indicates a credit number reading operation for the direct memory access apparatus, the first data moving instruction further comprises a second field indicating a credit number, and the credit number indicates a space size of the direct memory access apparatus for storing instructions; and the method comprises: decoding, by the interface decoder, the second field of the first data moving instruction, and controlling writing of an object data moving instruction into the direct memory access apparatus according to the credit number decoded, wherein the object data moving instruction comprises a first field, the first field of the object data moving instruction indicates a data moving operation for a neural-network processor, and the object data moving instruction is received and executed by the direct memory access apparatus, wherein the object data moving instruction comprises a second data moving instruction, the second data moving instruction comprises a second field, and the second field of the second data moving instruction indicates data moving address information, and wherein the neural-network processor comprises at least one processing unit array, and the data moving address information is obtained based on a mapping relationship between data to be moved and at least one processing unit in the processing unit array. ### Claim 18 (depends on 17) The method according to claim 17, wherein the first data moving instruction is a register type instruction. ### Claim 19 (depends on 17) The method according to claim 17, wherein the first data moving instruction is an instruction that conforms to a SCIE bus protocol interface.