# US 12,216,152 B2 · Gallium nitride-based devices and methods of testing thereof > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,216,152 B2 - Document ID: US12216152B2 - Status: Granted - Kind: B2 - Application number: 18/516,106 - Filed: 2023-11-21 - Published: 2024-03-14 - Granted: 2025-02-04 - Earliest claimed: 2021-12-29 - Assignees: Taiwan Semiconductor Manufacturing Company, Ltd. - Applicants: Taiwan Semiconductor Manufacturing Company, Ltd. - Inventors: Yi-An Lai; Chan-Hong Chern; Cheng-Hsiang Hsieh - Web page: https://patentgrep.com/patent/US12216152B2 ## CPC - G01R 31/2853: {Electrical testing of internal connections or -isolation, e.g. latch-up or chip-to-lead connections (G01R31/31717 takes precedence; test of chip-to-PCB or lead-to-PCB connections G01R31/66)} - G01R 31/2884: {using dedicated test connectors, test elements or test circuits on the IC under test (G01R31/2855 takes precedence)} - H10D 89/811: {using FETs as protective elements} - H10P 14/3416: {Nitrides} - G01R: MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES (indicating correct tuning of resonant circuits H03J3/12) - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES - H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10 ## Abstract An integrated circuit includes a first circuit, formed based on one or more Group III-V compound materials, that is configured to operate with a first voltage range. The integrated circuit includes a second circuit, also formed based on the one or more Group III-V compound materials, that is operatively coupled to the first circuit and configured to operate with a second voltage range, wherein the second voltage range is substantially higher than the first voltage range. The integrated circuit includes a set of first test terminals connected to the first circuit. The integrated circuit includes a set of second test terminals connected to the second circuit. Test signals applied to the set of first test terminals and to the set of second test terminals, respectively, are independent from each other. ## Claims ### Claim 1 An integrated circuit, comprising: a first circuit formed based on one or more Group III-V compound materials and configured to operate with a first voltage range; a second circuit formed based on the one or more Group III-V compound materials, operatively coupled to the first circuit, and configured to operate with a second voltage range, wherein the second voltage range is substantially higher than the first voltage range; a plurality of first test terminals only operatively coupled to the first circuit; and a plurality of second test terminals only operatively coupled to the second circuit. ### Claim 2 (depends on 1) The integrated circuit of claim 1, wherein the one or more Group III-V compound materials include gallium nitride. ### Claim 3 (depends on 1) The integrated circuit of claim 1, wherein the plurality of first test terminals are operatively coupled to a gate, a drain, and a source of at least one of a plurality of first transistors of the first circuit, respectively, and the plurality of second test terminals are operatively coupled to a gate, a drain, and a source of at least one of a plurality of second transistors of the second circuit, respectively. ### Claim 4 (depends on 1) The integrated circuit of claim 1, wherein test signals applied to the plurality of first test terminals and to the plurality of second test terminals, respectively, are independent from each other. ### Claim 5 (depends on 4) The integrated circuit of claim 4, wherein the test signals applied to the set of first test terminals, respectively, include a first signal, a second signal, and a third signal that are each a first fixed voltage in the second voltage range, and the test signals applied to the set of second test terminals, respectively, include a fourth signal, a fifth signal, and a sixth signal that are each a second fixed voltage in the second voltage range. ### Claim 6 (depends on 5) The integrated circuit of claim 5, wherein the test signals applied to the plurality of first test terminals and to the plurality of second test terminals are configured to identify an epitaxial defect for at least one of the first circuit or second circuit. ### Claim 7 (depends on 4) The integrated circuit of claim 4, wherein the test signals applied to the plurality of first test terminals, respectively, include a seventh signal, an eighth signal, and a ninth signal that are each a floating voltage, and the test signals applied to the plurality of second test terminals, respectively, include a tenth signal, an eleventh signal, and a twelfth signal that are a first voltage sweep, a second voltage sweep, and a ground voltage, respectively. ### Claim 8 (depends on 7) The integrated circuit of claim 7, wherein the test signals applied to the plurality of first test terminals and to the plurality of second test terminals are configured to identify a surface crystal defect for the second circuit. ### Claim 9 (depends on 4) The integrated circuit of claim 4, wherein the test signals applied to the plurality of first test terminals, respectively, include a thirteenth signal, an fourteenth signal, and a fifteenth signal that are each a floating voltage, and the test signals applied to the plurality of second test terminals, respectively, include a sixteenth signal, a seventeenth signal, and an eighteenth signal that are a ground voltage, a third fixed voltage, and a fourth fixed voltage, and wherein the fourth fixed voltage is substantially higher than the ground voltage. ### Claim 10 (depends on 4) The integrated circuit of claim 4, wherein the test signals applied to the plurality of first test terminals and to the plurality of second test terminals are configured to test the gate of the at least one of the second transistors of the second circuit. ### Claim 11 (depends on 4) The integrated circuit of claim 4, wherein the test signals applied to the plurality of first test terminals, respectively, include a nineteenth signal, a twentieth signal, a twenty-first signal that are a functional voltage, a fifth fixed voltage, and a ground voltage, and the test signals applied to the plurality of second test terminals, respectively, include a twenty-second signal, twenty-third signal, and twenty-fourth signal that are each a floating voltage. ### Claim 12 (depends on 11) The integrated circuit of claim 11, wherein the test signals applied to the plurality of first test terminals and to the plurality of second test terminals are configured to test a function of the first circuit. ### Claim 13 An integrated circuit, comprising: a first circuit formed based on gallium nitride, wherein the first circuit is configured to operate with a first voltage range; a second circuit formed based on the gallium nitride, wherein the second circuit is configured to operate with a second voltage range that is substantially higher than the first voltage range; a plurality of first test terminals connected only to the first circuit; and a plurality of second test terminals connected only to the second circuit; wherein test signals applied to the plurality of first test terminals and to the plurality of second test terminals, respectively, are independent from each other. ### Claim 14 (depends on 13) The integrated circuit of claim 13, wherein the plurality of first test terminals are operatively coupled to a gate, a drain, and a source of at least one of a plurality of first transistors of the first circuit, respectively, and the plurality of second test terminals are operatively coupled to a gate, a drain, and a source of at least one of a plurality of second transistors of the second circuit, respectively. ### Claim 15 (depends on 14) The integrated circuit of claim 14, wherein the test signals applied to the plurality of first test terminals, respectively, include a first signal, a second signal, and a third signal that are each a first fixed voltage in the second voltage range, and the test signals applied to the plurality of second test terminals, respectively, include a fourth signal, a fifth signal, and a sixth signal that are each a second fixed voltage in the second voltage range, and wherein the test signals applied to the plurality of first test terminals and to the plurality of second test terminals are configured to identify an epitaxial defect for at least one of the first circuit or second circuit. ### Claim 16 (depends on 14) The integrated circuit of claim 14, wherein the test signals applied to the plurality of first test terminals, respectively, include a seventh signal, an eighth signal, and a ninth signal that are each a floating voltage, and the test signals applied to the plurality of second test terminals, respectively, include a tenth signal, an eleventh signal, and a twelfth signal that are a first voltage sweep, a second voltage sweep, and a ground voltage, respectively, and wherein the test signals applied to the plurality of first test terminals and to the plurality of second test terminals are configured to identify a surface crystal defect for the second circuit. ### Claim 17 (depends on 14) The integrated circuit of claim 14, wherein the test signals applied to the plurality of first test terminals, respectively, include a thirteenth signal, an fourteenth signal, and a fifteenth signal that are each a floating voltage, and the test signals applied to the plurality of second test terminals, respectively, include a sixteenth signal, a seventeenth signal, and an eighteenth signal that are a ground voltage, a third fixed voltage, and a fourth fixed voltage, and wherein the fourth fixed voltage is substantially higher than the ground voltage. ### Claim 18 (depends on 14) The integrated circuit of claim 14, wherein the test signals applied to the plurality of first test terminals, respectively, include a nineteenth signal, a twentieth signal, a twenty-first signal that are a functional voltage, a fifth fixed voltage, and a ground voltage, and the test signals applied to the plurality of second test terminals, respectively, include a twenty-second signal, twenty-third signal, and twenty-fourth signal that are each a floating voltage, and wherein the test signals applied to the plurality of first test terminals and to the plurality of second test terminals are configured to test a function of the first circuit. ### Claim 19 An integrated circuit, comprising: a first circuit formed based on one or more Group III-V compound materials and configured to operate with a first voltage range; a second circuit formed based on the one or more Group III-V compound materials, operatively coupled to the first circuit, and configured to operate with a second voltage range, wherein the second voltage range is substantially higher than the first voltage range; a plurality of first test terminals only operatively coupled to the first circuit; and a plurality of second test terminals only operatively coupled to the second circuit; wherein the plurality of first test terminals are operatively coupled to a gate, a drain, and a source of at least one of a plurality of first transistors of the first circuit, respectively, and the plurality of second test terminals are operatively coupled to a gate, a drain, and a source of at least one of a plurality of second transistors of the second circuit, respectively. ### Claim 20 (depends on 19) The integrated circuit of claim 19, wherein the one or more Group III-V compound materials include gallium nitride.