Piezoelectric anti-stiction structure for microelectromechanical systems

An integrated chip (IC), comprising:

• an interconnect structure in a dielectric structure, which overlies a first substrate;
• a second substrate overlying the dielectric structure;
• a third substrate overlying both the first substrate and the second substrate, wherein the second substrate comprises a movable mass in a cavity between the first substrate and the third substrate;
• and
• a piezoelectric anti-stiction structure overlying the movable mass in the cavity and extending from a bottom surface of the third substrate;
• wherein the interconnect structure comprises a top wire and a top via extending from the top wire to the second substrate, and wherein a top surface of the top via is level with a top surface of the dielectric structure.

An integrated chip (IC), comprising:

• an interconnect structure in a dielectric structure, which overlies a first substrate;
• a second substrate overlying the dielectric structure;
• a third substrate overlying both the first substrate and the second substrate, wherein the second substrate comprises a movable mass in a cavity between the first substrate and the third substrate;
• and
• a piezoelectric anti-stiction structure underlying the movable mass in the cavity, wherein the piezoelectric anti-stiction structure comprises an electrode, a piezoelectric structure, and a cap structure having individual sidewalls that are vertically stacked and edge to edge to form a common sidewall facing a sidewall of the dielectric structure;
• wherein the dielectric structure comprises a first dielectric layer and a second dielectric layer overlying and directly contacting the first dielectric layer at an interface, wherein the interconnect structure comprises a top wire underlying and directly contacting the electrode of the piezoelectric anti-stiction structure, and wherein a bottom surface of the top wire is level with the interface.