Trigger signaling through a clock signal in cascading radar systems

A cascaded radar monolithic microwave integrated circuit (MMIC) system, comprising:

• a first radar MMIC comprising a trigger encoder configured to receive a clock signal comprising a plurality of clock pulses having a fixed duty cycle and a trigger signal configured to indicate trigger events,
• wherein the trigger encoder is configured to encode the trigger signal into the clock signal to generate a distributed clock signal by modifying a duty cycle of at least one clock pulse of the plurality of clock pulses to generate at least one encoded clock pulse that indicates a trigger event,
• wherein the duty cycle of the at least one encoded clock pulse is different from the fixed duty cycle, and
• wherein the first radar MMIC is configured to output the distributed clock signal having the at least one encoded clock pulse to indicate the trigger event;
• a second radar MMIC configured to receive the distributed clock signal and derive a system clock signal from the distributed clock signal, wherein the second radar MMIC comprises:
• a trigger decoder configured to detect the at least one encoded clock pulse in the distributed clock signal and generate the trigger signal comprising a trigger pulse that indicates the trigger event in response to detecting the at least one encoded clock pulse in the distributed clock signal;
• and
• a radar operation controller configured to receive the trigger signal and initiate a radar operation based on detecting the trigger pulse.

A method of synchronizing a cascaded radar monolithic microwave integrated circuit (MMIC) system, the method comprising:

• encoding, by a first radar MMIC, a trigger signal into a clock signal comprising a plurality of clock pulses having a fixed amplitude to generate a distributed clock signal by skipping at least one clock pulse of the plurality of clock pulses to indicate a trigger event, wherein the trigger signal is configured to indicate trigger events;
• outputting, by the first radar MMIC, the distributed clock signal having the at least one clock pulse skipped to indicate the trigger event;
• receiving, by a second radar MMIC, the distributed clock signal;
• deriving, by the second radar MMIC, a system clock signal from the distributed clock signal;
• demodulating, by the second radar MMIC, the distributed clock signal to detect an absence of the at least one clock pulse in the distributed clock signal;
• generating, by the second radar MMIC, the trigger signal comprising a trigger pulse that indicates the trigger event in response to detecting the absence of the at least one clock pulse in the distributed clock signal;
• and
• initiating, by the second radar MMIC, a radar operation based on detecting the trigger pulse in the trigger signal.

A radar monolithic microwave integrated circuit (MMIC), comprising:

• a local oscillator configured to generate a local oscillator signal;
• a trigger encoder configured to receive a clock signal comprising a plurality of clock pulses having a fixed amplitude and a trigger signal configured to indicate trigger events;
• wherein the trigger encoder is configured to encode the trigger signal into the clock signal to generate a distributed clock signal by skipping at least one clock pulse of the plurality of clock pulses to indicate a trigger event,
• wherein the radar MMIC is configured to output the distributed clock signal having the at least one clock pulse skipped to indicate the trigger event,
• wherein the radar MMIC is configured to receive the distributed clock signal as a received distributed clock signal, and
• wherein the radar MMIC is configured to output the local oscillator signal;
• and
• a radar operation controller configured to detect the trigger event based on the received distributed clock signal and initiate a radar operation based on detecting the trigger event.

A radar monolithic microwave integrated circuit (MMIC), comprising:

• at least one of a transmit channel for transmitting radio frequency (RF) signals or a receive channel for receiving RF echoes;
• a clock input circuit configured to receive a distributed clock signal and derive a system clock signal from the distributed clock signal,
• wherein the distributed clock signal is a clock signal comprising a plurality of clock pulses having a fixed amplitude that is encoded with a trigger signal configured to indicate trigger events, wherein at least one clock pulse of the plurality of clock pulses is skipped in the distributed clock signal to indicate a trigger event;
• a trigger decoder configured to detect an absence of the at least one clock pulse in the distributed clock signal and generate the trigger signal comprising a trigger pulse that indicates the trigger event in response to detecting the absence of the at least one clock pulse in the distributed clock signal;
• and
• a radar operation controller configured to receive the trigger signal and initiate a radar operation based on detecting the trigger pulse.