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US 12,206,014 B2Granted
Field-effect transistor and method for manufacturing the same
AssigneeNippon Telegraph and Telephone Corporation
InventorsTakuya Tsutsumi, Hideaki Matsuzaki
Life of this patent
Estimating the term…
Abstract
A gate electrode includes a main portion formed of a gate electrode material, and a gate electrode barrier layer disposed between the main portion and a barrier layer and formed of a conductive material that prevents the gate electrode material from diffusing into the barrier layer. A surface of the main portion in a region above a first insulating layer faces a periphery without a layer of the conductive material being formed.
Claims16
A method of manufacturing a field effect transistor, the method comprising:
- forming a buffer layer, a channel layer, a barrier layer, a carrier supply layer, and a cap layer on a semiconductor substrate;
- forming a source electrode and a drain electrode apart from each other on the cap layer;
- forming a first insulating layer and a second insulating layer in this order on the cap layer between the source electrode and the drain electrode;
- forming a first opening in the first insulating layer and forming a second opening in the second insulating layer, the second opening being continuous to the first opening in a thickness direction;
- etching the cap layer using the first insulating layer including the first opening and the second insulating layer including the second opening as masks and forming a recessed region in the cap layer under the first opening, the recessed region being formed by partially removing the cap layer in a direction of the source electrode and a direction of the drain electrode from the first opening in a plan view;
- forming a gate electrode by depositing a conductive material and a gate electrode material in this order from above the second insulating layer, the gate electrode being disposed above the first insulating layer, being fitted partially into the recessed region through the first opening, and comprising a main portion comprising the gate electrode material and a gate electrode barrier layer comprising the conductive material, the gate electrode barrier layer being disposed between the main portion and the barrier layer;
- removing the second insulating layer;
- and
- removing portions of the conductive material formed on a surface of the main portion in a region above the first insulating layer.
6 more elements
A field effect transistor comprising:
- a buffer layer on a semiconductor substrate;
- a channel layer on the buffer layer;
- a barrier layer on the channel layer;
- a carrier supply layer on the barrier layer;
- a cap layer on the carrier supply layer, the cap layer including a recessed region;
- a source electrode and a drain electrode disposed apart from each other on the cap layer;
- an insulating layer on the cap layer between the source electrode and the drain electrode and including an opening to expose the recessed region of the cap layer;
- and
- a gate electrode disposed above the insulating layer between the source electrode and the drain electrode and partially fitted into the recessed region through the opening in the insulating layer, the gate electrode comprising a main portion comprising a gate electrode material and a gate electrode barrier layer disposed between the main portion and the barrier layer and comprising a conductive material, wherein an uppermost surface of the gate electrode barrier layer is below a lowermost surface of the insulating layer, and wherein portions of lowermost sidewalls of the main portion that extend above the opening in the insulating layer face a periphery without the conductive material thereon.
6 more elements
Dependencies are inferred from the claim text.