Memory device

A memory device comprising:

• a first wiring line extending in a first direction;
• a second wiring line extending in a second direction intersecting the first direction;
• a memory cell which is connected between the first wiring line and the second wiring line, includes a resistance change memory portion having a first resistance state and a second resistance state having resistance higher than that of the first resistance state and a switching portion connected in series to the resistance change memory portion, and stores data based on a resistance state set to the resistance change memory portion and a state of the switching portion;
• and
• a voltage applying circuit which carries out, at a time of writing data to the memory cell, a voltage applying operation selected from a first voltage applying operation, a second voltage applying operation, a third voltage applying operation, and a fourth voltage applying operation, wherein
• the first voltage applying operation is an operation of setting first data to the memory cell by applying a voltage of a first polarity to the memory cell through the first wiring line and the second wiring line and thereafter applying a first voltage to the memory cell through the first wiring line and the second wiring line to thereby set the resistance change memory portion to the first resistance state,
• the second voltage applying operation is an operation of setting second data to the memory cell by applying a voltage of a second polarity opposite to the first polarity to the memory cell through the first wiring line and the second wiring line and thereafter applying a second voltage to the memory cell through the first wiring line and the second wiring line to thereby set the resistance change memory portion to the first resistance state,
• the third voltage applying operation is an operation of setting third data to the memory cell by applying a voltage of the first polarity to the memory cell through the first wiring line and the second wiring line and thereafter applying a third voltage to the memory cell through the first wiring line and the second wiring line to thereby set the resistance change memory portion to the second resistance state, and
• the fourth voltage applying operation is an operation of setting fourth data to the memory cell by applying a voltage of the second polarity to the memory cell through the first wiring line and the second wiring line and thereafter applying a fourth voltage to the memory cell through the first wiring line and the second wiring line to thereby set the resistance change memory portion to the second resistance state,
• wherein
• when reading data stored in the memory cell, the voltage applying circuit applies a read voltage to the memory cell through the first wiring line and the second wiring line,
• when the first data is stored in the memory cell, the memory cell has a first threshold voltage of the first polarity with respect to the read voltage of the first polarity,
• when the second data is stored in the memory cell, the memory cell has a second threshold voltage of the first polarity having an absolute value greater than that of the first threshold voltage with respect to the read voltage of the first polarity,
• when the third data is stored in the memory cell, the memory cell has a third threshold voltage of the first polarity having an absolute value greater than that of the second threshold voltage with respect to the read voltage of the first polarity,
• when the fourth data is stored in the memory cell, the memory cell has a fourth threshold voltage of the first polarity having an absolute value greater than that of the third threshold voltage with respect to the read voltage of the first polarity,
• when the second data is stored in the memory cell, the memory cell has a fifth threshold voltage of the second polarity with respect to the read voltage of the second polarity,
• when the first data is stored in the memory cell, the memory cell has a sixth threshold voltage of the second polarity having an absolute value greater than that of the fifth threshold voltage with respect to the read voltage of the second polarity,
• when the fourth data is stored in the memory cell, the memory cell has a seventh threshold voltage of the second polarity having an absolute value greater than that of the sixth threshold voltage with respect to the read voltage of the second polarity, and
• when the third data is stored in the memory cell, the memory cell has an eighth threshold voltage of the second polarity having an absolute value greater than that of the seventh threshold voltage with respect to the read voltage of the second polarity.