Imaging device and electronic apparatus

An imaging device, comprising:

• a light-receiving pixel configured to generate a pixel signal;
• a reference signal generator configured to generate a reference signal;
• a first amplification section coupled to a first power supply node and a second power supply node, wherein the first amplification section is configured to:
• perform a comparison operation based on the pixel signal and the reference signal;
• and
• output a specific signal to a first node, wherein the specific signal corresponds to a result of the comparison operation;
• a second amplification section that includes a first transistor and a first load circuit, wherein
• the first transistor includes a gate coupled to the first node, a drain coupled to a second node, and a source coupled to the second power supply node, and
• the first load circuit is coupled to the first power supply node and the second node;
• a third amplification section includes a second transistor and a first switch, wherein
• the second transistor includes a gate coupled to the second node, a source coupled to the first power supply node, and a drain coupled to a third node, and
• the first switch is turned one of on or off based on a control signal;
• and
• a counter coupled to a third power supply node and a fourth power supply node.

An electronic apparatus, comprising:

• an imaging device;
• and
• a processor configured to control an operation of the imaging device, wherein the electronic apparatus includes:
• a light-receiving pixel configured to generate a pixel signal that corresponds to an amount of received light,
• a reference signal generator configured to:
• generate a reference signal;
• and
• change a signal level of the reference signal with a lapse of time,
• a first amplification section coupled to a first power supply node and a second power supply node, wherein the first amplification is section is configured to:
• perform a comparison operation based on the pixel signal and the reference signal;
• and
• output a specific signal to a first node, wherein the specific signal corresponds to a result of the comparison operation,
• a second amplification section that includes a first transistor and a first load circuit, wherein
• the first transistor includes a gate coupled to the first node, a drain coupled to a second node, and a source coupled to the second power supply node, and
• the first load circuit is coupled to the first power supply node and the second node,
• a third amplification section that includes a second transistor and a first switch, wherein
• the second transistor includes a gate coupled to the second node, a source coupled to the first power supply node, and a drain coupled to a third node, and
• a specific voltage is applied to the third node based on the first switch being turned on, and
• a counter coupled to a third power supply node and a fourth power supply node, wherein the counter is configured to:
• perform a count operation;
• and
• stop the count operation based on a voltage of the third node.