Dynamic power allocation for memory using multiple interleaving patterns

A method comprising:

• executing instructions of operating system software for a processing apparatus stored in one or more memory devices in a set of memory devices using a first interleaving pattern to map virtual addresses to physical addresses;
• invoking a change from a first mode to a second mode for the processing apparatus while continuing to execute the operating system software, wherein the processing apparatus uses the first interleaving pattern for virtual address translation when in the first mode and uses a second interleaving pattern for virtual address translation when in the second mode;
• and wherein the first interleaving pattern is a first memory map and the second interleaving pattern is a second memory map;
• powering down a memory device in the set of memory devices when using the second interleaving pattern;
• and
• executing instructions of the operating system software using the second interleaving pattern, wherein the first interleaving pattern uses all memory devices in the set of memory devices and the second interleaving pattern uses less than all of the memory devices in the set of memory devices.

A non-transitory computer-readable storage medium that includes instructions that, when executed by a processor, facilitate performance of operations to:

• store instructions of operating system software in a first range of virtual addresses;
• dynamically change a mode of a memory management circuitry while executing the instructions in the first range of virtual addresses to select between a first interleaving pattern and a second interleaving pattern implemented by the memory management circuitry for translating virtual addresses to physical addresses in a set of memory devices, wherein the first interleaving pattern is a first memory map and the second interleaving pattern is a second memory map, and wherein the first interleaving pattern and the second interleaving pattern are the same within the first range of virtual addresses and there are differences between the first interleaving pattern and the second interleaving pattern outside of the first range of virtual addresses;
• store heap data in a second range of virtual addresses when using the first interleaving pattern to utilize all memory devices in the set of memory devices for storing heap data;
• and
• power down a memory device in the set of memory devices when using the second interleaving pattern;
• and
• store heap data in a third range of virtual addresses when using the second interleaving pattern, wherein the third range of virtual addresses is smaller than the second range of virtual addresses.