# US 12,193,221 B2 · Semiconductor structure and method for forming the same

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- Number: US 12,193,221 B2
- Document ID: US12193221B2
- Status: Granted
- Kind: B2
- Application number: 17/340,507
- Filed: 2021-06-07
- Published: 2021-12-23
- Granted: 2025-01-07
- Earliest claimed: 2020-06-18
- Assignees: Winbond Electronics Corp.
- Applicants: Winbond Electronics Corp.
- Inventors: Wei-Che Chang; Kai Jen; Yu-Po Wang
- Web page: https://patentgrep.com/patent/US12193221B2

## CPC

- H10B 12/50: {Peripheral circuit region structures}
- H10W 10/014: {using trench refilling with dielectric materials, e.g. shallow trench isolations}
- H10B 12/053: {the transistor being at least partially in a trench in the substrate (vertical transistor in combination with a capacitor formed in a substrate trench H10B12/0383)}
- H10B 12/09: {with simultaneous manufacture of the peripheral circuit region and memory cells}
- H10B 12/34: {the transistor being at least partially in a trench in the substrate}
- H10W 10/0143: {comprising concurrently refilling multiple trenches having different shapes or dimensions}
- H10W 10/17: formed using trench refilling with dielectric materials, e.g. shallow trench isolations
- H10B: ELECTRONIC MEMORY DEVICES
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A semiconductor structure includes a semiconductor substrate and an isolation structure disposed in the semiconductor substrate. The isolation structure includes a lining layer disposed along a boundary between the semiconductor substrate and the isolation structure, a first oxide fill layer disposed over the lining layer, a dielectric barrier structure surrounding the first oxide fill layer in a closed loop, and a second oxide fill layer disposed over the dielectric barrier structure and adjacent to the lining layer.

## Claims

### Claim 1

A semiconductor structure, comprising:
a semiconductor substrate; and
an isolation structure disposed in the semiconductor substrate, wherein the isolation structure comprises:
a lining layer disposed along a boundary between the isolation structure and the semiconductor substrate;
a first oxide fill layer disposed over the lining layer;
a dielectric barrier structure surrounding the first oxide fill layer in a closed loop; and
a second oxide fill layer disposed over the dielectric barrier structure and adjacent to the lining layer,
wherein the lining layer is in direct contact with the second oxide fill layer.

### Claim 2 (depends on 1)

The semiconductor structure as claimed in claim 1, wherein the dielectric barrier structure comprises:
a first section along an upper surface of the first oxide fill layer; and
a second section along a sidewall of the first oxide fill layer, wherein a thickness of the second section of the dielectric barrier structure is greater than a thickness of the first section of the dielectric barrier structure.

### Claim 3 (depends on 2)

The semiconductor structure as claimed in claim 2, wherein the second section of the dielectric barrier structure comprises:
a silicon oxynitride layer; and
a silicon nitride layer between the lining layer and the silicon oxynitride layer.

### Claim 4 (depends on 2)

The semiconductor structure as claimed in claim 2, wherein the first section of the dielectric barrier structure comprises a silicon nitride layer between the first oxide fill layer and the second oxide fill layer.

### Claim 5 (depends on 1)

The semiconductor structure as claimed in claim 1, further comprising:
a second isolation structure disposed in the semiconductor substrate, wherein the second isolation structure comprises a first nitride fill layer: and
a third isolation structure disposed in the semiconductor substrate, wherein the third isolation structure comprises a second nitride fill layer, and a thickness of the second nitride fill layer is greater than a thickness of the first nitride fill layer.

### Claim 6 (depends on 5)

The semiconductor structure as claimed in claim 5, wherein the second isolation structure further comprises a third oxide fill layer disposed over the first nitride fill layer.

### Claim 7 (depends on 1)

The semiconductor structure as claimed in claim 1, wherein the lining layer is made of a silicon oxide.

### Claim 8

A semiconductor structure, comprising:
a semiconductor substrate; and
an isolation structure disposed in the semiconductor substrate, wherein the isolation structure comprises:
a nitride fill layer;
a first oxide fill layer disposed over the nitride fill layer;
a dielectric barrier structure surrounding the first oxide fill layer in a closed loop;
a second oxide fill layer disposed over the dielectric barrier structure; and
a lining structure disposed between the semiconductor substrate and the isolation structure, wherein the lining structure is in direct contact with the second oxide fill layer.

### Claim 9 (depends on 8)

The semiconductor structure as claimed in claim 8, wherein the lining structure comprises:
a first portion disposed between a side surface of the semiconductor substrate and a sidewall of the nitride fill layer;
a second portion disposed between the side surface of the semiconductor substrate and a sidewall of the dielectric barrier structure; and
a third portion disposed between an upper surface of the nitride fill layer and a bottom surface of the dielectric barrier structure.

### Claim 10 (depends on 9)

The semiconductor structure as claimed in claim 9, wherein a thickness of the second portion of the lining structure is greater than a thickness of the first portion of the lining structure.