# US 12,193,208 B2 · Capacitors with electrodes having a portion of material removed, and related semiconductor devices, systems, and methods

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- Number: US 12,193,208 B2
- Document ID: US12193208B2
- Status: Granted
- Kind: B2
- Application number: 17/647,902
- Filed: 2022-01-13
- Published: 2022-07-28
- Granted: 2025-01-07
- Earliest claimed: 2021-01-20
- Assignees: Micron Technology, Inc.
- Applicants: Micron Technology, Inc.
- Inventors: Devesh Dadhich Shreeram; Kangle Li; Matthew N. Rocklein; Wei Ching Huang; Ping-Cheng Hsu; Sevim Korkmaz; Sanjeev Sapra; An-Jen B. Cheng
- Web page: https://patentgrep.com/patent/US12193208B2

## CPC

- H10B 12/033: {the capacitor extending over the transistor}
- H10D 1/716: {having vertical extensions}
- H10B 12/31: {having a storage electrode stacked over the transistor}
- H10B: ELECTRONIC MEMORY DEVICES
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

A DRAM capacitor may include a first capacitor electrode, a capacitor dielectric adjacent to the first capacitor electrode, and a second capacitor electrode adjacent to the capacitor dielectric. The first capacitor electrode may include a lower portion, an upper portion, and a step transition between the lower portion and the upper portion, a width of the upper portion of the first capacitor electrode at the step transition is less than a width of the lower portion of the first capacitor electrode at the step transition. Semiconductor devices, systems, and methods are also disclosed.

## Claims

### Claim 1

A DRAM capacitor, comprising:
a first capacitor electrode comprising a proximal base disposed on a substrate and opposing portions extending from the proximal base, the opposing portions configured as a container, the opposing portions comprising a lower portion, an upper portion, and a first step transition between the lower portion and the upper portion, a width of the upper portion at the first step transition is less than a width of the lower portion at the first step transition;
a capacitor dielectric adjacent to the first capacitor electrode; and
a second capacitor electrode adjacent to the capacitor dielectric.

### Claim 2 (depends on 1)

The DRAM capacitor of claim 1, wherein a difference in width between the upper portion and the lower portion at the first step transition is between about 1 Å and about 50 Å.

### Claim 3 (depends on 2)

The DRAM capacitor of claim 2, wherein a difference in width between the upper portion and the lower portion at the first step transition is between about 5 Å and about 20 Å.

### Claim 4 (depends on 2)

The DRAM capacitor of claim 2, wherein a difference in width between the upper portion and the lower portion at the first step transition is between about 20 Å and about 40 Å.

### Claim 5 (depends on 2)

The DRAM capacitor of claim 2, wherein a difference in width between the upper portion and the lower portion at the first step transition is between about 40 Å and about 50 Å.

### Claim 6 (depends on 1)

The DRAM capacitor of claim 1, wherein the first capacitor electrode comprises titanium nitride.

### Claim 7 (depends on 1)

The DRAM capacitor of claim 1, wherein the first capacitor electrode comprises a doped titanium nitride.

### Claim 8 (depends on 7)

The DRAM capacitor of claim 7, wherein the doped titanium nitride comprises titanium nitride doped with one or more of silicon, boron, aluminum, zirconium, hafnium, phosphorus, carbon, gallium, germanium, antimony, tellurium, arsenic, or tungsten.

### Claim 9 (depends on 1)

The DRAM capacitor of claim 1, further comprising at least one lattice material laterally adjacent to the first capacitor electrode.

### Claim 10 (depends on 1)

The DRAM capacitor of claim 1, further comprising a second step transition between the lower portion and the upper portion.

### Claim 11 (depends on 10)

The DRAM capacitor of claim 10, wherein a difference in width between the upper portion adjacent the first step transition and the lower portion adjacent the second step transition is between about 1 Å and about 50 Å.

### Claim 12

A semiconductor device comprising:
DRAM capacitors, at least one DRAM capacitor of the DRAM capacitors comprising:
a first capacitor electrode and a laterally adjacent first capacitor electrode, the first capacitor electrode and the laterally adjacent first capacitor electrode each comprising a lower portion and an upper portion, the lower portion having a different width than the upper portion at a step transition, a difference in width between the lower portion and the upper portion at the step transition being between about 1 Å and about 50 Å, and a distance between an outer surface of the first capacitor electrode and an outer surface of the laterally adjacent first capacitor electrode being greater between respective upper portions of the first capacitor electrode and the laterally adjacent first capacitor electrode than between respective lower portions of the first capacitor electrode and the laterally adjacent first capacitor electrode;
a capacitor dielectric on the first capacitor electrode and the laterally adjacent first capacitor electrode; and
a second capacitor electrode and a laterally adjacent second capacitor electrode on the capacitor dielectric; and
access devices operably coupled to the DRAM capacitors.

### Claim 13 (depends on 12)

The semiconductor device of claim 12, wherein an aspect ratio of the at least one DRAM capacitor is greater than about 20:1.

### Claim 14 (depends on 12)

The semiconductor device of claim 12, wherein an aspect ratio of the at least one DRAM capacitor is from about 50:1 to about 100:1.

### Claim 15

A system comprising:
a memory array comprising:
memory cells comprising DRAM capacitors and access devices operably coupled to the DRAM capacitors, at least one of the DRAM capacitors comprising:
a first capacitor electrode formed on a substrate, the first capacitor electrode comprising a lower portion neighboring the substrate and an upper portion disposed away from the substrate, the lower portion having a greater thickness than the upper portion along an entire length of the first capacitor electrode;
a capacitor dielectric adjacent to the first capacitor electrode; and
a second capacitor electrode adjacent to the capacitor dielectric.