# US 12,193,168 B2 · Circuit board and semiconductor device including the same

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- Number: US 12,193,168 B2
- Document ID: US12193168B2
- Status: Granted
- Kind: B2
- Application number: 18/169,193
- Filed: 2023-02-14
- Published: 2023-06-22
- Granted: 2025-01-07
- Earliest claimed: 2019-02-26
- Assignees: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicants: Taiwan Semiconductor Manufacturing Company, Ltd.
- Inventors: Jiun-Yi Wu; Chien-Hsun Lee; Chen-Hua Yu; Chung-Shi Liu
- Web page: https://patentgrep.com/patent/US12193168B2

## CPC

- H05K 3/4046: {using auxiliary conductive elements, e.g. metallic spheres, eyelets, pieces of wire}
- H10W 70/6875: {being on a metallic substrate, e.g. insulated metal substrates [IMS]}
- H05K 1/0298: {Multilayer circuits}
- H05K 1/113: {Via provided in pad; Pad over filled via}
- H05K 3/0061: {onto a metallic substrate, e.g. a heat sink (heat sinks for electric apparatus H05K7/20)}
- H05K 3/4608: {comprising an electrically conductive base or core}
- H10W 40/255: {having a laminate or multilayered structure, e.g. direct bond copper [DBC] ceramic substrates}
- H10W 70/611: {for connecting multiple chips together}
- H10W 70/635: {Through-vias}
- H05K 2201/10734: Ball grid array [BGA]; Bump grid array
- H10W 90/401: {characterised by multiple insulating or insulated package substrates, interposers or RDLs}
- H10W 90/701: {characterised by the relative positions of pads or connectors relative to package parts}
- Y10T 29/49165: by forming conductive walled aperture in base
- H05K: PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- Y10T: TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION

## Abstract

Circuit board includes conductive plate, core dielectric layer, metallization layer, first build-up stack, second build-up stack. Conductive plate has channels extending from top surface to bottom surface. Core dielectric layer extends on covering top surface and side surfaces of conductive plate. Metallization layer extends on core dielectric layer and within channels of conductive plate. Core dielectric layer insulates metallization layer from conductive plate. First build-up stack is disposed on top surface of conductive plate and includes conductive layers alternately stacked with dielectric layers. Conductive layers electrically connect to metallization layer. Second build-up stack is disposed on bottom surface of conductive plate. Second build-up stack includes bottommost dielectric layer and bottommost conductive layer. Bottommost dielectric layer covers bottom surface of conductive plate. Bottommost conductive layer is disposed on bottommost dielectric layer and electrically connects to metallization layer. First build-up stack includes more conductive and dielectric layers than second build-up stack.

## Claims

### Claim 1

A circuit board, comprising:
a conductive plate having channels extending through the conductive plate in a thickness direction;
an inner dielectric layer, disposed on and covering the conductive plate but exposing a bottom surface of the conductive plate;
a metallization layer, extending on the inner dielectric layer and within the channels of the conductive plate, wherein the inner dielectric layer insulates the metallization layer from the conductive plate;
a first stack, disposed on the inner dielectric layer and over a top surface of the conductive plate, wherein the first stack comprises first conductive layers alternately stacked with first dielectric layers, and the first conductive layers are electrically connected with the metallization layer; and
a second stack, disposed on the bottom surface of the conductive plate, wherein the second stack comprises a second dielectric layer covering the bottom surface of the conductive plate and a second conductive layer stacked on the second dielectric layer, and the second conductive layer is electrically connected with the metallization layer,
wherein a number of the first conductive layers and the first dielectric layers of the first stack is larger than a number of the second conductive layer and the second dielectric layer of the second stack.

### Claim 2 (depends on 1)

The circuit board of claim 1, wherein the conductive plate is made of a metal material containing iron, nickel or an alloy thereof.

### Claim 3 (depends on 1)

The circuit board of claim 1, further comprising a first mask layer disposed on the first stack, and a second mask layer disposed on the second stack.

### Claim 4 (depends on 1)

The circuit board of claim 1, wherein a material of the inner dielectric layer includes a polymeric material, a photosensitive dielectric material, fiberglass or a combination thereof.

### Claim 5 (depends on 1)

The circuit board of claim 1, further comprising via fillers disposed within the channels of the conductive plate, wherein the metallization layer surrounds the via fillers.

### Claim 6 (depends on 5)

The circuit board of claim 5, wherein the metallization layer comprises:
via portions disposed between the via fillers and the inner dielectric layer within the channels;
pad portions disposed on a top surface and a bottom surface of the inner dielectric layer; and
via caps, disposed on the via fillers and connected with the pad portions.

### Claim 7 (depends on 1)

The circuit board of claim 1, wherein the metallization layer includes openings exposing the bottom surface of the conductive plate and portions of the inner dielectric layer.

### Claim 8

A structure, comprising:
a conductive plate having ducts extending from a first side of the conductive plate to an opposite second side of the conductive plate;
an inner dielectric layer, disposed on the conductive plate, covering the first side of the conductive plate and lining the ducts of the conductive plate to form through holes;
conductive through vias disposed inside the inner dielectric layer and filling up the through holes, wherein the conductive through vias comprises:
conductive via portions disposed on the inner dielectric layer within the through holes;
conductive pads, disposed on a top surface and a bottom surface of the inner dielectric layer and connected with the conductive via portions;
via plugs disposed on the conductive via portions and filling the conductive via portions within the through holes; and
via caps disposed on the via plugs and joined with the conductive pads; and
dielectric layers and conductive layers alternately stacked on the first and second sides of the conductive plate,
wherein the conductive layers are electrically connected to the conductive through vias, and the conductive through vias are electrically insulated from the conductive plate.

### Claim 9 (depends on 8)

The structure of claim 8, wherein the via caps and the conductive pads are made of a metallic material.

### Claim 10 (depends on 8)

The structure of claim 8, wherein the conductive plate is made of a metal material containing iron, nickel or an alloy thereof, and a material of the inner dielectric layer includes a polymeric material, a photosensitive dielectric material, fiberglass or a combination thereof.

### Claim 11 (depends on 8)

The structure of claim 8, wherein a total number of the stacked dielectric layers and conductive layers on the first side of the conductive plate is greater than a total number of the stacked dielectric layers and conductive layers on the second side of the conductive plate.

### Claim 12 (depends on 8)

The structure of claim 8, further comprising:
a semiconductor package disposed on the stacked dielectric layers and conductive layers on the first side of the conductive plate; and
first connectors, disposed between the semiconductor package and the conductive plate.

### Claim 13 (depends on 12)

The structure of claim 12, further comprising second connectors disposed on an outermost conductive layer stacked on the second side of the conductive plate.

### Claim 14 (depends on 13)

The structure of claim 13, further comprising a mask layer partially covering the outermost conductive layer and exposing the second connectors.

### Claim 15

A circuit board, comprising:
a composite structure including a conductive plate and an inner dielectric layer wrapping the conductive plate except for exposing a bottom surface of the conductive plate;
conductive through vias, extending through the inner dielectric layer and located beside the conductive plate, wherein the conductive plate is electrically insulated from the conductive through vias;
a lower dielectric layer, located at one side of the composite structure, and covering the bottom surface of the conductive plate, wherein the lower dielectric layer has first openings exposing portions of the conductive through vias;
a lower conductive layer, extending on the lower dielectric layer and contacting the conductive through vias in the first openings of the lower dielectric layer;
an upper dielectric layer, located on the inner dielectric layer and at another side of the composite structure opposite to the one side, wherein the upper dielectric layer comprises second openings exposing the conductive through vias; and
an upper conductive layer, extending on the upper dielectric layer and contacting the conductive through vias in the second openings of the upper dielectric layer,
wherein a material of the inner dielectric layer is different from a material of the lower dielectric layer and a material of the upper dielectric layer.

### Claim 16 (depends on 15)

The circuit board of claim 15, further comprising additional upper conductive layers and upper dielectric layers alternately stacked on the upper conductive layer.

### Claim 17 (depends on 15)

The circuit board of claim 15, wherein the conductive through vias include conductive via filler plugs.

### Claim 18 (depends on 15)

The circuit board of claim 15, further comprising a metallization pattern disposed on the inner dielectric layer over the conductive plate, wherein the inner dielectric layer insulates the metallization pattern from the conductive plate.

### Claim 19 (depends on 15)

The circuit board of claim 15, wherein the conductive plate is made of a metal material containing iron, nickel or an alloy thereof.

### Claim 20 (depends on 15)

The circuit board of claim 15, wherein a material of the inner dielectric layer includes a polymeric material, a photosensitive dielectric material, fiberglass or a combination thereof.