# US 12,193,156 B2 · Wiring substrate and method for manufacturing wiring substrate > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,193,156 B2 - Document ID: US12193156B2 - Status: Granted - Kind: B2 - Application number: 17/730,283 - Filed: 2022-04-27 - Published: 2022-11-17 - Granted: 2025-01-07 - Earliest claimed: 2021-05-14 - Assignees: Ibiden Co., Ltd. - Applicants: Ibiden Co., Ltd. - Inventors: Tomoyuki Ikeda; Kentaro Wada - Web page: https://patentgrep.com/patent/US12193156B2 ## CPC - H05K 1/112: {directly combined with via connections} - H05K 1/183: associated with components mounted in and supported by recessed areas of the PCBs - H05K 1/185: associated with components encapsulated in the insulating substrate of the PCBs; associated with components incorporated in internal layers of multilayer circuit boards - H05K 3/384: {by plating} - H05K 3/4007: {Surface contacts, e.g. bumps (H05K3/4092 takes precedence; deposition of finish layers on pads H05K3/24; forming solder bumps H05K3/3465)} - H05K 3/4038: {Through-connections; Vertical interconnect access [VIA] connections (H05K3/403, H05K3/42 take precedence)} - H10W 70/6525: {for securing the interconnections to the substrate, e.g. to prevent peeling} - H05K 1/111: {Pads for surface mounting, e.g. lay-out} - H05K 2201/096: Vertically aligned vias, holes or stacked vias - H10W 70/611: {for connecting multiple chips together} - H10W 70/614: {the multiple chips being integrally enclosed} - H10W 70/635: {Through-vias} - H10W 70/685: comprising multiple insulating layers - H05K: PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 ## Abstract A wiring substrate includes a first insulating layer, a conductor layer formed on the first insulating layer, a second insulating layer formed on the first insulating layer such that the second insulating layer is covering the conductor layer, and a coating film formed on a surface of the conductor layer such that the coating film is adhering the conductor layer and the second insulating layer. The conductor layer includes a conductor pad and a wiring pattern, and the conductor pad of the conductor layer has a mounting surface including a first region and a component mounting region formed such that the second insulating layer has a through hole exposing the component mounting region and that the first region is covered by the second insulating layer and roughened to have a surface roughness higher than a first surface roughness of a surface of the wiring pattern facing the second insulating layer. ## Claims ### Claim 1 A wiring substrate, comprising: a first insulating layer; a conductor layer formed on the first insulating layer; a second insulating layer formed on the first insulating layer such that the second insulating layer is covering the conductor layer; and a coating film formed on a surface of the conductor layer such that the coating film is adhering the conductor layer and the second insulating layer, wherein the conductor layer includes a conductor pad and a wiring pattern, the conductor pad of the conductor layer has a mounting surface including a first region and a component mounting region formed such that the second insulating layer has a through hole exposing the component mounting region and that the first region is covered by the second insulating layer, and the conductor pad of the conductor layer is formed such that the first region of the mounting surface has a surface roughness that is higher than a first surface roughness of a surface of the wiring pattern facing the second insulating layer. ### Claim 2 (depends on 1) The wiring substrate according to claim 1, wherein the conductor pad of the conductor layer is formed such that the first region of the mounting surface is covered partly or entirely by the coating film. ### Claim 3 (depends on 2) The wiring substrate according to claim 2, wherein the conductor pad of the conductor layer is formed such that the first region includes a portion that is in direct contact with the second insulating layer. ### Claim 4 (depends on 2) The wiring substrate according to claim 2, wherein the conductor pad of the conductor layer is formed such that the first region has an arithmetic mean roughness Ra of at least twice an arithmetic mean roughness Ra of the first surface roughness of the surface of the wiring pattern facing the second insulating layer. ### Claim 5 (depends on 2) The wiring substrate according to claim 2, wherein the coating film is formed such that the coating film is covering a portion of the first region of the conductor pad, and the second insulating layer is formed such that the through hole is formed on a portion of the first region that is not covered by the coating film and that the conductor pad is spaced apart from the coating film. ### Claim 6 (depends on 2) The wiring substrate according to claim 2, wherein the conductor pad of the conductor layer is formed such that the mounting surface includes a second region having a surface roughness substantially equal to or lower than the first surface roughness of the wiring pattern and being surrounded by the first region, and the second insulating layer is formed such that the through hole is exposing the second region of the conductor pad partially or entirely. ### Claim 7 (depends on 1) The wiring substrate according to claim 1, wherein the conductor pad of the conductor layer is formed such that the first region of the mounting surface is in direct contact with the second insulating layer. ### Claim 8 (depends on 1) The wiring substrate according to claim 1, wherein the conductor pad of the conductor layer is formed such that the first region of the mounting surface has an arithmetic mean roughness Ra of at least twice an arithmetic mean roughness Ra of the first surface roughness of the surface of the wiring pattern facing the second insulating layer. ### Claim 9 (depends on 1) The wiring substrate according to claim 1, wherein the coating film is formed such that the coating film is covering a portion of the first region of the conductor pad, and the second insulating layer is formed such that the through hole is formed on a portion of the first region that is not covered by the coating film and that the conductor pad is spaced apart from the coating film. ### Claim 10 (depends on 1) The wiring substrate according to claim 1, wherein the coating film is formed such that the coating film has an opening having an area larger than an area of the conductor pad and exposing the conductor pad entirely. ### Claim 11 (depends on 1) The wiring substrate according to claim 1, wherein the conductor pad of the conductor layer is formed such that the mounting surface includes a second region having a surface roughness substantially equal to or lower than the first surface roughness of the wiring pattern and being surrounded by the first region, and the second insulating layer is formed such that the through hole is exposing the second region of the conductor pad partially or entirely. ### Claim 12 (depends on 1) The wiring substrate according to claim 1, further comprising: a second conductor layer formed on the second insulating layer; and a connection conductor formed in the second insulating layer such that the connection conductor is connecting the conductor layer and the second conductor layer, wherein the conductor layer includes a second conductor pad formed in contact with the connection conductor such that the second conductor pad has an upper surface on an opposite side with respect to the first insulating layer and that the upper surface includes a region roughened to have a surface roughness higher than the first surface roughness of the wiring pattern. ### Claim 13 (depends on 12) The wiring substrate according to claim 12, wherein the second conductor pad of the conductor layer is formed such that a portion of the upper surface of the second conductor pad is covered by the second insulating layer and has substantially a same surface roughness as the first region. ### Claim 14 (depends on 1) The wiring substrate according to claim 1, wherein the coating film is formed such that the coating film has an opening having an area larger than an area of the conductor pad and exposing the conductor pad entirely. ### Claim 15 A method for manufacturing a wiring substrate, comprising: forming a conductor layer including a conductor pad and a wiring pattern on a first insulating layer; roughening an exposed surface of the conductor layer formed on the first insulating layer; forming a coating film on at least portion of the exposed surface of the first conductor layer; forming a second insulating layer such that the second insulating layer covers the first conductor layer and the coating film; and forming a through hole in the second insulating layer such that the through hole penetrates through the second insulating layer and exposes a component accommodating part of the conductor pad, wherein the roughening of the exposed surface of the conductor layer includes roughening the exposed surface of the conductor pad without roughening an exposed surface of the wiring pattern of the conductor layer, the conductor pad of the conductor layer has a mounting surface including a first region and a component mounting region formed such that the second insulating layer has the through hole exposing the component mounting region and that the first region is covered by the second insulating layer, and the conductor pad of the conductor layer is formed such that the first region of the mounting surface has a surface roughness that is higher than a first surface roughness of a surface of the wiring pattern facing the second insulating layer. ### Claim 16 (depends on 15) The method for manufacturing a wiring substrate according to claim 15, further comprising: removing a portion of the coating film covering the conductor pad prior to the forming of the second insulating layer, wherein the through hole is formed on a portion of the conductor pad that is not covered by the coating film such that the conductor pad is spaced apart from the coating film. ### Claim 17 (depends on 15) The method for manufacturing a wiring substrate according to claim 15, wherein the forming of the coating film includes forming the coating film such that the conductor pad is exposed entirely and spaced apart from the coating film. ### Claim 18 (depends on 15) The method for manufacturing a wiring substrate according to claim 15, wherein the roughening of the exposed surface of the conductor layer includes leaving a non-roughened region on a surface of the conductor pad on an opposite side with respect to the first insulating layer, and the forming of the through hole includes exposing the non-roughened region. ### Claim 19 (depends on 18) The method for manufacturing a wiring substrate according to claim 18, wherein the forming of the through hole includes exposing the non-roughened region entirely in the through hole. ### Claim 20 (depends on 15) The method for manufacturing a wiring substrate according to claim 15, further comprising: forming a second conductor layer on the second insulating layer; and forming a connection conductor in the second insulating layer such that the connection conductor penetrates through the second insulating layer and connects the conductor layer and the second conductor layer, wherein the conductor layer is formed such that the conductor includes a second conductor pad and that the connection conductor is connected to the second conductor pad, and the roughening of the exposed surface of the conductor layer includes roughening an exposed surface of the second conductor pad and the exposed surface of the conductor pad in a same process.