# US 12,193,142 B2 · Ground discontinuities for thermal isolation > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,193,142 B2 - Document ID: US12193142B2 - Status: Granted - Kind: B2 - Application number: 18/063,136 - Filed: 2022-12-08 - Published: 2023-06-22 - Granted: 2025-01-07 - Earliest claimed: 2020-11-17 - Assignees: International Business Machines Corporation - Applicants: International Business Machines Corporation - Inventors: Trevor Timpane; Layne A. Berge; Patryk Gumann; Sean Hart; Curtis Eugene Larsen; Michael Good - Web page: https://patentgrep.com/patent/US12193142B2 ## CPC - G06N 10/40: Physical realisations or architectures of quantum processors or components for manipulating qubits, e.g. qubit coupling or qubit control - H05K 1/0201: {Thermal arrangements, e.g. for cooling, heating or preventing overheating} - G06N 10/00: Quantum computing, i.e. information processing based on quantum-mechanical phenomena - H05K 1/0221: {Coaxially shielded signal lines comprising a continuous shielding layer partially or wholly surrounding the signal lines} - H05K 1/0225: {Single or multiple openings in a shielding, ground or power plane (H05K1/0227 takes precedence)} - H05K 1/0237: {High frequency adaptations (H05K1/0216 takes precedence)} - H05K 1/09: Use of materials for the {conductive, e.g. } metallic pattern - H05K 1/18: structurally associated with non-printed electric components (H05K1/16 takes precedence) - H05K 3/02: in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding - H05K 3/32: electrically connecting electric components or wires to printed circuits - H10N 60/81: Containers; Mountings - H10N 69/00: Integrated devices, or assemblies of multiple devices, comprising at least one superconducting element covered by group H10N60/00 - H05K 1/023: {using auxiliary mounted passive components or auxiliary substances (printed passive components H05K1/16)} - H05K 1/115: {Via connections; Lands around holes or via connections (H05K1/112 takes precedence)} - H05K 2201/062: Means for thermal insulation, e.g. for protection of parts - H05K 2201/10363: Jumpers, i.e. non-printed cross-over connections - G06N: COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS - H05K: PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS - H10N: ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR ## Abstract A quantum mechanical circuit includes a substrate; a first electrical conductor and a second electrical conductor provided on the substrate and spaced apart to provide a gap therebetween; and a third electrical conductor to electrically connect the first electrical conductor and the second electrical conductor. The third electrical conductor is a poor thermal conductor. ## Claims ### Claim 1 A quantum mechanical circuit comprising: a substrate; a first electrical conductor and a second electrical conductor provided on the substrate and spaced apart to provide a gap therebetween, wherein the first electrical conductor and the second electrical conductor are electrically decoupled by providing the gap between the first electrical conductor and the second electrical conductor within the substrate; and a third electrical conductor coupled to the first electrical conductor and the second electrical conductor, wherein the third electrical conductor comprises Copper-Nickel (CuNi) having an electrical resistivity that is approximately 3.8×10−8 Ωm at ambient temperature and a thermal conductivity that is between about 25 W/m° K and 40 W/m° K. ### Claim 2 (depends on 1) The quantum mechanical circuit according to claim 1, wherein the third electrical conductor further comprises stainless steel. ### Claim 3 (depends on 1) The quantum mechanical circuit according to claim 1, wherein the first, second and third electrical conductors are configured to transmit a radiofrequency electrical current. ### Claim 4 (depends on 1) The quantum mechanical circuit according to claim 1, wherein the first electrical conductor and the second electrical conductor comprise copper (Cu). ### Claim 5 (depends on 2) The quantum mechanical circuit of claim 2, wherein the third electrical conductor is coupled to the substrate using fasteners. ### Claim 6 (depends on 5) The quantum mechanical circuit according to claim 5, wherein the fasteners comprise brass. ### Claim 7 (depends on 1) The quantum mechanical circuit according to claim 1, wherein the first electrical conductor and the second electrical conductor are connected to electrical ground. ### Claim 8 (depends on 1) The quantum mechanical circuit according to claim 1, further comprising attenuator chips electrically coupled to the first electrical conductor and the second electrical conductor. ### Claim 9 A superconducting quantum mechanical computer comprising: a refrigeration system comprising a temperature-controlled vessel; a quantum processor disposed within the temperature-controlled vessel, the quantum processor comprising a plurality of qubits; and a superconducting circuit disposed inside the temperature-controlled vessel, the superconducting circuit comprising: a substrate; a first electrical conductor and a second electrical conductor provided on the substrate and spaced apart to provide a gap therebetween, wherein the first electrical conductor and the second electrical conductor are electrically decoupled by providing the gap between the first electrical conductor and the second electrical conductor within the substrate; and a third electrical conductor coupled to the first electrical conductor and the second electrical conductor, wherein the third electrical conductor comprises Copper-Nickel (CuNi) having an electrical resistivity that is approximately 3.8×10−8 Ωm at ambient temperature and a thermal conductivity that is between about 25 W/m° K and 40 W/m° K. ### Claim 10 (depends on 9) The superconducting quantum mechanical computer according to claim 9, wherein the third electrical conductor further comprises stainless steel. ### Claim 11 (depends on 9) The superconducting quantum mechanical computer according to claim 9, wherein the plurality of qubits are provided on the substrate and each of the plurality of qubits is electrically connected to ground via at least one of the first electrical conductor or the second electrical conductor. ### Claim 12 (depends on 9) The superconducting quantum mechanical computer according to claim 9, wherein the first electrical conductor and the second electrical conductor comprise copper (Cu). ### Claim 13 (depends on 10) The superconducting quantum mechanical computer according to claim 10, wherein the first, second and third electrical conductor are configured to transmit a radiofrequency electrical current. ### Claim 14 (depends on 10) The superconducting quantum mechanical computer according to claim 10, wherein the third electrical conductor is coupled to the substrate using fasteners. ### Claim 15 (depends on 9) The superconducting quantum mechanical computer according to claim 9, wherein the first electrical conductor and the second electrical conductor are connected to electrical ground. ### Claim 16 (depends on 9) The superconducting quantum mechanical computer according to claim 9, further comprising attenuator chips electrically coupled to the first electrical conductor and the second electrical conductor. ### Claim 17 (depends on 9) The superconducting quantum mechanical computer according to claim 9, wherein the temperature-controlled vessel is fully enclosed within the refrigeration system. ### Claim 18 A method of manufacturing a quantum mechanical circuit comprising: providing a substrate having a top face and a bottom face; forming a conductive layer on at least one of the top face or the bottom face of the substrate; and forming conductor lines in a selected pattern on the substrate by removing portions of the conductive layer, the conductor lines including a first electrical conductor and a second electrical conductor on the substrate, the first electrical conductor and the second electrical conductor being spaced apart and separated by a gap therebetween, wherein the first electrical conductor and the second electrical conductor are electrically decoupled by providing the gap between the first electrical conductor and the second electrical conductor within the substrate and by providing blind vias through the substrate that are not aligned with one another to reduce electrical coupling between the first electrical conductor and the second electrical conductor.